📄 s2gx_pcie_top_vhd.sdo

📁 基于SIIGX的PCIe的Kit
💻 SDO
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// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP2SGX90FF1508C3 Package FBGA1508
// 

// 
// This SDF file should be used for ModelSim (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "s2gx_pcie_top")
  (DATE "07/26/2007 14:43:15")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.0 Build 33 02/05/2007 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

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