ddr2_v340_ecc.qarlog

基于SIIGX的PCIe的Kit

Quartus II Archive log --	C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.qarlog

Archive:	C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.qar
Date:		Mon May 08 14:51:50 2006
Quartus II		6.0 Build 178 04/27/2006 SJ Full Version

	=========== Files Selected: ===========
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr2_init.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_avalon_if.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_bank_details.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_controller.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_functions.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_input_buf.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_tb_functions.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_timers.vhd
C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/example_lfsr8.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/add_constraints_for_ddr2_topecc.tcl
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/auto_add_ddr_constraints.tcl
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/auto_verify_ddr_timing.tcl
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/constraints_out.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/a_dpfifo_7u11.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/altsyncram_a6e1.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/cntr_bu8.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/cntr_cu8.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/cntr_qs7.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/ddio_out_t6f.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/ddio_out_tkf.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/ddr2_v340_ecc.cbx.xml
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/ddr2_v340_ecc.qpf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/scfifo_a691.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/db/scfifo_e691.tdf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc.bsf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_EP2SGX90F_stratixii-c3_paths.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_auk_ddr_clk_gen.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_auk_ddr_datapath.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_auk_ddr_dll.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_auk_ddr_dqs_group.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_auk_ddr_sdram.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_bb.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_ddr_settings.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_estimated_data.dat
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_example_driver.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_extraction_data.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_extraction_failures.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_extraction_log.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_extraction_log2.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_post_summary.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_topecc_pre_compile_ddr_timing_summary.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.asm.rpt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.done
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.fit.rpt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.fit.smsg
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.fit.summary
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.flow.rpt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.map.rpt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.map.summary
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.pin
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.pof
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.qarlog
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.qsf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.qws
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.sof
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.tan.rpt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.tan.summary
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr2_v340_ecc_first.sof
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr_lib_path.tcl
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr_pll_stratixii.bsf
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr_pll_stratixii.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr_pll_stratixii_bb.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/ddr_pll_stratixii_inst.v
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/extraction_max_allnodes.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/extraction_min_allnodes.txt
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/remove_add_constraints_for_ddr2_topecc.tcl
C:/cvs_sandbox/boards/stratix2_gx/stratix2_gx_pciex/pld/ddr2/ddr2_v340_ecc/verify_timing_for_ddr2_topecc.tcl
c:/altera/quartus60/bin/quartus.ini
c:/altera/quartus60/win/assignment_defaults.qdf
	======= Total: 71 files to archive =======



******* Archived project restoration attempt on Fri Jul 20 17:10:25 2007
Source archive file:	E:/data/SIIGX_PCIe_Kit/Examples/ManufacturingTestDesigns/ddr2_v340_ecc.qar
Archive was extracted into	E:/data/SIIGX_PCIe_Kit/Examples/ManufacturingTestDesigns/ddr2_v340_ecc_restored
		 - successfully.