ddr2_v340_ecc.qsf

基于SIIGX的PCIe的Kit

set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[35]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[36]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[37]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[38]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[39]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[40]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[41]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[42]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[43]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[44]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[45]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[46]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[47]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[48]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[49]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[50]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[51]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[52]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[53]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[54]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[55]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[56]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[57]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[58]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[59]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[60]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[61]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[62]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[63]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[64]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[65]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[66]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[67]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[68]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[69]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[70]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[71]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[2]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[3]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[4]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[5]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[6]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[7]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dqs[8]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to clk_to_sdram_p[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to clk_to_sdram_p[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to clk_to_sdram_p[2]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to clk_to_sdram_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to clk_to_sdram_n[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to clk_to_sdram_n[2]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_ras_n
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_cas_n
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_we_n
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_cke[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[2]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[3]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[4]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[5]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[6]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[7]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[8]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[9]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[10]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[11]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[12]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_ba[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_ba[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_cs_n[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_odt[0]
set_instance_assignment -name IO_STANDARD LVDS -to clock_source
set_instance_assignment -name CUT ON -from ddr2_dqs[0] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[1] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[2] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[3] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[4] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[5] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[6] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[7] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[8] -to *
set_location_assignment PIN_AW19 -to clk_to_sdram_p[0]
set_location_assignment PIN_AU20 -to clk_to_sdram_p[1]
set_location_assignment PIN_AP20 -to clk_to_sdram_p[2]
set_location_assignment PIN_AV19 -to clk_to_sdram_n[0]
set_location_assignment PIN_AT20 -to clk_to_sdram_n[1]
set_location_assignment PIN_AN20 -to clk_to_sdram_n[2]
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER clk_to_sdram_p[0] -section_id ddr2_topecc_clk_out_pair0
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER clk_to_sdram_p[1] -section_id ddr2_topecc_clk_out_pair1
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER clk_to_sdram_p[2] -section_id ddr2_topecc_clk_out_pair2
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER clk_to_sdram_n[0] -section_id ddr2_topecc_clk_out_pair0
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER clk_to_sdram_n[1] -section_id ddr2_topecc_clk_out_pair1
set_global_assignment -name ASSIGNMENT_GROUP_MEMBER clk_to_sdram_n[2] -section_id ddr2_topecc_clk_out_pair2
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr2_topecc_clk_out_pair0
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr2_topecc_clk_out_pair1
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr2_topecc_clk_out_pair2
set_instance_assignment -name TPD_REQUIREMENT "1.6 ns" -from *captured_* -to *resynched_data*
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io"
set_location_assignment PIN_AU9 -to ddr2_dq[0]
set_location_assignment LAB_X80_Y1 -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[0]"