ddr2_v340_ecc.qsf

基于SIIGX的PCIe的Kit

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		ddr2_v340_ecc_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Stratix II GX"
set_global_assignment -name DEVICE EP2SGX90FF1508C3
set_global_assignment -name TOP_LEVEL_ENTITY ddr2_v340_ecc
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:28:15  MAY 05, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1508
set_global_assignment -name USER_LIBRARIES "E:/data/SIIGX_PCIe_Kit/Examples/ManufacturingTestDesigns/ddr2_v340_ecc_restored/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/;C:/altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib;"
set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_sh:auto_verify_ddr_timing.tcl"
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dm
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dqs
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dq
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_ras_n
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_cas_n
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_we_n
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_cke[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[2]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[3]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[4]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[5]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[6]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[7]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[8]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[9]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[10]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[11]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_a[12]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_ba[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_ba[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_cs_n[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_odt[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[2]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[3]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[4]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[5]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[6]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[7]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dm[8]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[0]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[1]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[2]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[3]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[4]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[5]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[6]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[7]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[8]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[9]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[10]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[11]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[12]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[13]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[14]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[15]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[16]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[17]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[18]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[19]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[20]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[21]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[22]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[23]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[24]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[25]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[26]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[27]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[28]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[29]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[30]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[31]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[32]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[33]
set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS II" -to ddr2_dq[34]