ddr2_v340_ecc.map.summary

来自「基于SIIGX的PCIe的Kit」· SUMMARY 代码 · 共 16 行

Analysis & Synthesis Status : Successful - Fri Jun 23 15:23:15 2006
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : ddr2_v340_ecc
Top-level Entity Name : ddr2_mfg_test
Family : Stratix II GX
Total ALUTs : 3820
Total registers : 2720
Total pins : 144
Total virtual pins : 0
Total memory bits : 1,096,992
DSP block 9-bit elements : 8
Total GXB Receiver Channels : 0
Total GXB Transmitter Channels : 0
Total PLLs : 1
Total DLLs : 1