ddr2_v340_ecc.qsf

基于SIIGX的PCIe的Kit

set_instance_assignment -name IO_STANDARD "1.8 V" -to reset_n
set_location_assignment PIN_AM22 -to reset_n
set_location_assignment PIN_AP16 -to ddr2_a[0]
set_location_assignment PIN_AH28 -to ddr2_a[1]
set_location_assignment PIN_AP26 -to ddr2_a[2]
set_location_assignment PIN_AP29 -to ddr2_a[3]
set_location_assignment PIN_AL15 -to ddr2_a[4]
set_location_assignment PIN_AK27 -to ddr2_a[5]
set_location_assignment PIN_AK25 -to ddr2_a[6]
set_location_assignment PIN_AU29 -to ddr2_a[7]
set_location_assignment PIN_AH15 -to ddr2_a[8]
set_location_assignment PIN_AH25 -to ddr2_a[9]
set_location_assignment PIN_AT30 -to ddr2_a[10]
set_location_assignment PIN_AN21 -to ddr2_a[11]
set_location_assignment PIN_AP28 -to ddr2_a[12]
set_location_assignment PIN_AL28 -to ddr2_a[13]
set_location_assignment PIN_AG19 -to ddr2_a[14]
set_location_assignment PIN_AN28 -to ddr2_ba[0]
set_location_assignment PIN_AG24 -to ddr2_ba[1]
set_location_assignment PIN_AH27 -to ddr2_ba[2]
set_location_assignment PIN_AJ27 -to ddr2_ras_n
set_location_assignment PIN_AG23 -to ddr2_cas_n
set_location_assignment PIN_AL13 -to ddr2_we_n
set_location_assignment PIN_AF18 -to ddr2_cke
set_location_assignment PIN_AJ25 -to ddr2_cs_n
set_location_assignment PIN_AN25 -to ddr2_odt
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name SEED 1
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dm
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dqs
set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dq
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_ras_n
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_cas_n
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_we_n
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_cke[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[2]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[3]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[4]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[5]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[6]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[7]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[8]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[9]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[10]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[11]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_a[12]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_ba[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_ba[1]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_cs_n[0]
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to ddr2_odt[0]
set_instance_assignment -name CUT ON -from ddr2_dqs[0] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[1] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[2] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[3] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[4] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[5] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[6] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[7] -to *
set_instance_assignment -name CUT ON -from ddr2_dqs[8] -to *
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr2_topecc_clk_out_pair0
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr2_topecc_clk_out_pair1
set_instance_assignment -name MAX_DATA_ARRIVAL_SKEW "100 ps" -from "ddr_pll_stratixii:g_stratixpll_ddr_pll_inst|altpll:altpll_component|_clk0" -to ddr2_topecc_clk_out_pair2
set_instance_assignment -name TPD_REQUIREMENT "1.6 ns" -from *captured_* -to *resynched_data*
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:2:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:2:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:3:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:3:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:4:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:4:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:5:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:5:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:6:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:6:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:7:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:7:g_ddr_io"
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED "NEVER ALLOW" -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:8:g_ddr_io"
set_instance_assignment -name REMOVE_DUPLICATE_REGISTERS OFF -to "ddr2_topecc:ddr2_topecc_ddr_sdram|ddr2_topecc_auk_ddr_sdram:ddr2_topecc_auk_ddr_sdram_inst|ddr2_topecc_auk_ddr_datapath:ddr_io|ddr2_topecc_auk_ddr_dqs_group:\\g_datapath:8:g_ddr_io"
set_global_assignment -name FMAX_REQUIREMENT "100 MHz"
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_tb_functions.vhd"
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_functions.vhd"
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_input_buf.vhd"
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_timers.vhd"
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_avalon_if.vhd"
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr_bank_details.vhd"
set_global_assignment -name VHDL_FILE "altera/MegaCore/ddr_ddr2_sdram-v3.4.0/lib/auk_ddr2_init.vhd"
set_global_assignment -name VERILOG_FILE ddr2_topecc.v
set_global_assignment -name BDF_FILE ddr2_mfg_test.bdf
set_global_assignment -name VHDL_FILE altera_europa_support.vhd