📄 cntr_e19.tdf
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--lpm_counter DEVICE_FAMILY="Stratix II" lpm_avalue=2 lpm_modulus=0 lpm_width=14 aset clk_en clock q
--VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:07:00:11:16:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_counter 2005:02:02:04:37:10:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_mgl 2005:03:28:10:52:10:SJ cbx_stratix 2005:03:14:17:09:02:SJ cbx_stratixii 2004:12:22:13:27:12:SJ VERSION_END
-- Copyright (C) 1988-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
FUNCTION stratixii_lcell_comb (cin, dataa, datab, datac, datad, datae, dataf, datag, sharein)
WITH ( EXTENDED_LUT, LUT_MASK, SHARED_ARITH)
RETURNS ( combout, cout, shareout, sumout);
FUNCTION stratixii_lcell_ff (aclr, adatasdata, aload, clk, datain, ena, sclr, sload)
RETURNS ( regout);
--synthesis_resources = lut 14 reg 14
SUBDESIGN cntr_e19
(
aset : input;
clk_en : input;
clock : input;
q[13..0] : output;
)
VARIABLE
counter_comb_bita0 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "000000000000AAAA",
SHARED_ARITH = "OFF"
);
counter_comb_bita1 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita2 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita3 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita4 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita5 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita6 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita7 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita8 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita9 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita10 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita11 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita12 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_comb_bita13 : stratixii_lcell_comb
WITH (
EXTENDED_LUT = "OFF",
LUT_MASK = "0000555500003333",
SHARED_ARITH = "OFF"
);
counter_reg_bit1a[13..0] : stratixii_lcell_ff;
a_val[13..0] : WIRE;
aclr_actual : WIRE;
cnt_en : NODE;
data[13..0] : NODE;
external_cin : WIRE;
lsb_cin : WIRE;
s_val[13..0] : WIRE;
safe_q[13..0] : WIRE;
sclr : NODE;
sload : NODE;
sset : NODE;
sync_data_wire[13..0] : WIRE;
sync_select_wire : WIRE;
time_to_clear : WIRE;
updown_dir : WIRE;
updown_lsb : WIRE;
updown_other_bits : WIRE;
BEGIN
counter_comb_bita[0].cin = lsb_cin;
counter_comb_bita[1].cin = counter_comb_bita[0].cout;
counter_comb_bita[2].cin = counter_comb_bita[1].cout;
counter_comb_bita[3].cin = counter_comb_bita[2].cout;
counter_comb_bita[4].cin = counter_comb_bita[3].cout;
counter_comb_bita[5].cin = counter_comb_bita[4].cout;
counter_comb_bita[6].cin = counter_comb_bita[5].cout;
counter_comb_bita[7].cin = counter_comb_bita[6].cout;
counter_comb_bita[8].cin = counter_comb_bita[7].cout;
counter_comb_bita[9].cin = counter_comb_bita[8].cout;
counter_comb_bita[10].cin = counter_comb_bita[9].cout;
counter_comb_bita[11].cin = counter_comb_bita[10].cout;
counter_comb_bita[12].cin = counter_comb_bita[11].cout;
counter_comb_bita[13].cin = counter_comb_bita[12].cout;
counter_comb_bita[0].dataa = counter_reg_bit1a[0].regout;
counter_comb_bita[1].dataa = counter_reg_bit1a[1].regout;
counter_comb_bita[2].dataa = counter_reg_bit1a[2].regout;
counter_comb_bita[3].dataa = counter_reg_bit1a[3].regout;
counter_comb_bita[4].dataa = counter_reg_bit1a[4].regout;
counter_comb_bita[5].dataa = counter_reg_bit1a[5].regout;
counter_comb_bita[6].dataa = counter_reg_bit1a[6].regout;
counter_comb_bita[7].dataa = counter_reg_bit1a[7].regout;
counter_comb_bita[8].dataa = counter_reg_bit1a[8].regout;
counter_comb_bita[9].dataa = counter_reg_bit1a[9].regout;
counter_comb_bita[10].dataa = counter_reg_bit1a[10].regout;
counter_comb_bita[11].dataa = counter_reg_bit1a[11].regout;
counter_comb_bita[12].dataa = counter_reg_bit1a[12].regout;
counter_comb_bita[13].dataa = counter_reg_bit1a[13].regout;
counter_comb_bita[0].datab = updown_lsb;
counter_comb_bita[1].datab = updown_other_bits;
counter_comb_bita[2].datab = updown_other_bits;
counter_comb_bita[3].datab = updown_other_bits;
counter_comb_bita[4].datab = updown_other_bits;
counter_comb_bita[5].datab = updown_other_bits;
counter_comb_bita[6].datab = updown_other_bits;
counter_comb_bita[7].datab = updown_other_bits;
counter_comb_bita[8].datab = updown_other_bits;
counter_comb_bita[9].datab = updown_other_bits;
counter_comb_bita[10].datab = updown_other_bits;
counter_comb_bita[11].datab = updown_other_bits;
counter_comb_bita[12].datab = updown_other_bits;
counter_comb_bita[13].datab = updown_other_bits;
counter_reg_bit1a[].aclr = aclr_actual;
counter_reg_bit1a[].adatasdata = a_val[];
counter_reg_bit1a[].aload = aset;
counter_reg_bit1a[].clk = clock;
counter_reg_bit1a[0].datain = ((sync_select_wire & sync_data_wire[0..0]) # ((! sync_select_wire) & counter_comb_bita[0].sumout));
counter_reg_bit1a[1].datain = ((sync_select_wire & sync_data_wire[1..1]) # ((! sync_select_wire) & counter_comb_bita[1].sumout));
counter_reg_bit1a[2].datain = ((sync_select_wire & sync_data_wire[2..2]) # ((! sync_select_wire) & counter_comb_bita[2].sumout));
counter_reg_bit1a[3].datain = ((sync_select_wire & sync_data_wire[3..3]) # ((! sync_select_wire) & counter_comb_bita[3].sumout));
counter_reg_bit1a[4].datain = ((sync_select_wire & sync_data_wire[4..4]) # ((! sync_select_wire) & counter_comb_bita[4].sumout));
counter_reg_bit1a[5].datain = ((sync_select_wire & sync_data_wire[5..5]) # ((! sync_select_wire) & counter_comb_bita[5].sumout));
counter_reg_bit1a[6].datain = ((sync_select_wire & sync_data_wire[6..6]) # ((! sync_select_wire) & counter_comb_bita[6].sumout));
counter_reg_bit1a[7].datain = ((sync_select_wire & sync_data_wire[7..7]) # ((! sync_select_wire) & counter_comb_bita[7].sumout));
counter_reg_bit1a[8].datain = ((sync_select_wire & sync_data_wire[8..8]) # ((! sync_select_wire) & counter_comb_bita[8].sumout));
counter_reg_bit1a[9].datain = ((sync_select_wire & sync_data_wire[9..9]) # ((! sync_select_wire) & counter_comb_bita[9].sumout));
counter_reg_bit1a[10].datain = ((sync_select_wire & sync_data_wire[10..10]) # ((! sync_select_wire) & counter_comb_bita[10].sumout));
counter_reg_bit1a[11].datain = ((sync_select_wire & sync_data_wire[11..11]) # ((! sync_select_wire) & counter_comb_bita[11].sumout));
counter_reg_bit1a[12].datain = ((sync_select_wire & sync_data_wire[12..12]) # ((! sync_select_wire) & counter_comb_bita[12].sumout));
counter_reg_bit1a[13].datain = ((sync_select_wire & sync_data_wire[13..13]) # ((! sync_select_wire) & counter_comb_bita[13].sumout));
counter_reg_bit1a[].ena = (clk_en & (((cnt_en # sclr) # sset) # sload));
a_val[] = B"00000000000010";
aclr_actual = B"0";
cnt_en = VCC;
data[] = GND;
external_cin = B"1";
lsb_cin = B"0";
q[] = safe_q[];
s_val[] = B"11111111111111";
safe_q[] = counter_reg_bit1a[].regout;
sclr = GND;
sload = GND;
sset = GND;
sync_data_wire[] = ((aset & a_val[]) # ((! aset) & ((! sclr) & ((sset & s_val[]) # ((! sset) & data[])))));
sync_select_wire = ((sclr # sset) # sload);
time_to_clear = B"0";
updown_dir = B"1";
updown_lsb = updown_dir;
updown_other_bits = ((! external_cin) # updown_dir);
END;
--VALID FILE
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