sld_ela_trigger_jjq.tdf

基于SIIGX的PCIe的Kit

--sld_ela_trigger ASYNC_ENABLED=0 DATA_BITS=28 LEVEL_NAMES="sld_reserved_error_marker,Instance auto_signaltap_0 Level 1," SYNC_ENABLED=1 TRIGGER_LEVEL=1 acq_clk clrn data_in enable_trigger reset_all setup_bit_in setup_bit_out setup_ena tck trigger_level_ena trigger_level_match_out
--VERSION_BEGIN 4.1 cbx_mgl 2004:06:17:17:30:06:SJ cbx_sld_ela_trigger 2004:07:30:10:40:44:SJ  VERSION_END


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FUNCTION sld_ela_basic_multi_level_trigger (acq_clk, clrn, data_in[27..0], reset_all, setup_bit_in, setup_ena, tck, trigger_level_ena[0..0])
WITH ( 	ASYNC_ENABLED,	DATA_BITS,	PIPELINE,	SYNC_ENABLED,	TRIGGER_LEVEL) 
RETURNS ( setup_bit_out, trigger_level_match_out[0..0]);

--synthesis_resources = sld_ela_basic_multi_level_trigger 1 
SUBDESIGN sld_ela_trigger_jjq
( 
	acq_clk	:	input;
	clrn	:	input;
	data_in[27..0]	:	input;
	enable_trigger[0..0]	:	input;
	reset_all	:	input;
	setup_bit_in	:	input;
	setup_bit_out	:	output;
	setup_ena	:	input;
	tck	:	input;
	trigger_level_ena[0..0]	:	input;
	trigger_level_match_out[0..0]	:	output;
) 
VARIABLE 
	mgl_prim1 : sld_ela_basic_multi_level_trigger
		WITH (
			ASYNC_ENABLED = 0,
			DATA_BITS = 28,
			PIPELINE = 1,
			SYNC_ENABLED = 1,
			TRIGGER_LEVEL = 1
		);
	w8w	: WIRE;

BEGIN 
	mgl_prim1.acq_clk = acq_clk;
	mgl_prim1.clrn = ((clrn & enable_trigger[0..0]) & (! mgl_prim1.trigger_level_match_out[]));
	mgl_prim1.data_in[] = data_in[];
	mgl_prim1.reset_all = reset_all;
	mgl_prim1.setup_bit_in = w8w;
	mgl_prim1.setup_ena = setup_ena;
	mgl_prim1.tck = tck;
	mgl_prim1.trigger_level_ena[0..0] = trigger_level_ena[0..0];
	setup_bit_out = mgl_prim1.setup_bit_out;
	trigger_level_match_out[] = ( mgl_prim1.trigger_level_match_out[]);
	w8w = setup_bit_in;
	ASSERT (0) 
	REPORT "Instance auto_signaltap_0 Level 1 has invalid trigger condition"
	SEVERITY ERROR;
END;
--ERROR FILE