idt71421.ftm

来自「VHDL的ram和fifo model code 包含众多的厂家」· FTM 代码 · 共 343 行

FTM
343 行
字号 
<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for idt71421 Parts</TITLE><BODY><REVISION.HISTORY>version: | author:       | mod date: | changes made:  V1.0     N.Makljenovic   05 Feb 17   Initial release</REVISION.HISTORY><TIMESCALE>1ns</TIMESCALE><MODEL>idt71421<FMFTIME>CY7C146-15JC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE>CY7C146-15NC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (5.0:10.0:15) (5.0:10.0:15))    (IOPATH CELNeg IOL0 () () (3.3:6.6:10) (3.0:10.0:15) (3.3:6.6:10) (3.0:10.0:15))    (IOPATH OELNeg IOL0 () () (3.3:6.6:10) (3.0:6.6:10) (3.3:6.6:10) (3.0:6.6:10))    (IOPATH RWL INTRNeg () () (5.0:10.0:15) () () (5.0:10.0:15))    (IOPATH RWL IOL0 () () (3.3:6.6:10) (0:5.0:10) (3.3:6.6:10) (0:5.0:10))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (12))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))                                                                                    (SETUP CELNeg RWL    (12))    (SETUP IOL0 RWL      (10))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (2))    (HOLD RWL BUSYLNeg   (13))    (WIDTH (negedge RWL) (12))    (WIDTH (negedge AL0) (15))    (WIDTH (posedge AL0) (15))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(15)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(15))))</TIMING></FMFTIME><FMFTIME>CY7C146-25JC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE>CY7C146-25NC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (8.3:16.6:25) (8.3:16.6:25))    (IOPATH CELNeg IOL0 () () (5.0:10.0:15) (5.0:16.6:25) (5.0:10.0:15) (5.0:16.6:25))    (IOPATH OELNeg IOL0 () () (5.0:10.0:15) (3.0:9.5:15) (5.0:10.0:15) (3.0:9.5:15))    (IOPATH RWL INTRNeg () () (8.3:16.6:25) () () (8.3:16.6:25))    (IOPATH RWL IOL0 () () (5.0:10.0:15) (0:10.0:15) (5.0:10.0:15) (0:10.0:15))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (20))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))                                                                                    (SETUP CELNeg RWL    (20))    (SETUP IOL0 RWL      (15))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (2))    (HOLD RWL BUSYLNeg   (20))    (WIDTH (negedge RWL) (15))    (WIDTH (negedge AL0) (25))    (WIDTH (posedge AL0) (25))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(25)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(25))))</TIMING></FMFTIME><FMFTIME>CY7C146-30JC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE>CY7C146-30NC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (10.0:20.0:30) (10.0:20.0:30))    (IOPATH CELNeg IOL0 () () (5.0:10.0:15) (5:20:30) (5.0:10.0:15) (5:20:30))    (IOPATH OELNeg IOL0 () () (5.0:10.0:15) (3:14:20) (5.0:10.0:15) (3:14:20))    (IOPATH RWL INTRNeg () () (8.3:16.6:25) () () (8.3:16.6:25))    (IOPATH RWL IOL0 () () (5.0:10.0:15) (0:10.0:15) (5.0:10.0:15) (0:10.0:15))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (25))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))                                                                                    (SETUP CELNeg RWL    (25))    (SETUP IOL0 RWL      (15))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (2))    (HOLD RWL BUSYLNeg   (20))    (WIDTH (negedge RWL) (25))    (WIDTH (negedge AL0) (30))    (WIDTH (posedge AL0) (30))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(30)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(30))))</TIMING></FMFTIME><FMFTIME>CY7C146-35JC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE>CY7C146-35NC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (11.0:23.0:35) (11.0:23.0:35))    (IOPATH CELNeg IOL0 () () (7.0:14.0:20) (5:23:35) (7.0:14.0:20) (5:23:35))    (IOPATH OELNeg IOL0 () () (7.0:14.0:20) (3:14:20) (7.0:14.0:20) (3:14:20))    (IOPATH RWL INTRNeg () () (8.3:16.6:25) () () (8.3:16.6:25))    (IOPATH RWL IOL0 () () (7.0:14.0:20) (0:14.0:20) (7.0:14.0:20) (0:14.0:20))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (30))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (30))    (SETUP IOL0 RWL      (25))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (2))    (HOLD RWL BUSYLNeg   (30))    (WIDTH (negedge RWL) (25))    (WIDTH (negedge AL0) (35))    (WIDTH (posedge AL0) (35))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(35)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(35))))</TIMING></FMFTIME><FMFTIME>CY7C146-45JC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE>CY7C146-45NC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (15.0:30.0:45) (15.0:30.0:45))    (IOPATH CELNeg IOL0 () () (7.0:14.0:20) (5:30:45) (7.0:14.0:20) (5:30:45))    (IOPATH OELNeg IOL0 () () (7.0:14.0:20) (3:16:25) (7.0:14.0:20) (3:16:25))    (IOPATH RWL INTRNeg () () (11.0:23.0:35) () () (11.0:23.0:35))    (IOPATH RWL IOL0 () () (7.0:14.0:20) (0:14.0:20) (7.0:14.0:20) (0:14.0:20))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (35))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (35))    (SETUP IOL0 RWL      (30))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (2))    (HOLD RWL BUSYLNeg   (35))    (WIDTH (negedge RWL) (30))    (WIDTH (negedge AL0) (45))    (WIDTH (posedge AL0) (45))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(45)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(45))))</TIMING></FMFTIME><FMFTIME>CY7C146-55JC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE>CY7C146-55NC<SOURCE>Cypress Semiconductor 38-06031 Rev.*B, June 21, 2004</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (18.0:37.0:55) (18.0:37.0:55))    (IOPATH CELNeg IOL0 () () (8.0:16.0:25) (5:37:55) (8.0:16.0:25) (5:37:55))    (IOPATH OELNeg IOL0 () () (8.0:16.0:25) (3:16:25) (8.0:16.0:25) (3:16:25))    (IOPATH RWL INTRNeg () () (18.0:37.0:55) () () (18.0:37.0:55))    (IOPATH RWL IOL0 () () (8.0:16.0:25) (0:16.0:25) (8.0:16.0:25) (0:16.0:25))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (40))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (40))    (SETUP IOL0 RWL      (30))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (2))    (HOLD RWL BUSYLNeg   (35))    (WIDTH (negedge RWL) (30))    (WIDTH (negedge AL0) (55))    (WIDTH (posedge AL0) (55))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(55)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(55))))</TIMING></FMFTIME><FMFTIME>IDT71421LA20J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA20J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA20PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA20PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA20TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA20TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (6.7:13.3:20) (6.7:13.3:20))    (IOPATH CELNeg IOL0 () () (3.3:6.7:10) (6.7:13.3:20) (3.3:6.7:10) (6.7:13.3:20))    (IOPATH OELNeg IOL0 () () (3.3:6.7:10) (3.7:7.3:11) (3.3:6.7:10) (3.7:7.3:11))    (IOPATH RWL INTRNeg () () (6.7:13.3:20) () () (6.7:13.3:20))    (IOPATH RWL IOL0 () () (0:2:4) (3.3:6.7:10) (0:2:4) (3.3:6.7:10))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (15))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (15))    (SETUP IOL0 RWL      (10))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg     (0))    (HOLD RWL BUSYLNeg   (12))    (WIDTH (negedge RWL) (15))    (WIDTH (negedge AL0) (20))    (WIDTH (posedge AL0) (20))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(50)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(35))))</TIMING></FMFTIME><FMFTIME>IDT71421LA25J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA25J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA25PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA25PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA25TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA25TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (8.3:16.7:25) (8.3:16.7:25))    (IOPATH CELNeg IOL0 () () (3.3:6.7:10) (8.3:16.7:25) (3.3:6.7:10) (8.3:16.7:25))    (IOPATH OELNeg IOL0 () () (3.3:6.7:10) (4:8:12) (3.3:6.7:10) (4:8:12))    (IOPATH RWL INTRNeg () () (8.3:16.7:25) () () (8.3:16.7:25))    (IOPATH RWL IOL0 () () (3.3:6.7:10) (0:2:4) (3.3:6.7:10) (0:2:4))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (20))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (20))    (SETUP IOL0 RWL      (12))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0    RWL    (0))    (HOLD AL0 CELNeg     (0))    (HOLD RWL BUSYLNeg   (15))    (WIDTH (negedge RWL) (15))    (WIDTH (negedge AL0) (25))    (WIDTH (posedge AL0) (25))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(50)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(35))))</TIMING></FMFTIME><FMFTIME>IDT71421LA35J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA35J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA35PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA35PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA35TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA35TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= 0 to +70 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (11.7:23.3:35) (11.7:23.3:35))    (IOPATH CELNeg IOL0 () () (5:10:15) (11.7:23.3:35) (5:10:15) (11.7:23.3:35))    (IOPATH OELNeg IOL0 () () (5:10:15) (6.7:13.3:20) (5:10:15) (6.7:13.3:20))    (IOPATH RWL INTRNeg () () (8.3:16.7:25) () () (8.3:16.7:25))    (IOPATH RWL IOL0 () () (5:10:15) (0:2:4) (5:10:15) (0:2:4))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (30))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (30))    (SETUP IOL0 RWL      (15))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0  RWL      (0))    (HOLD AL0 CELNeg     (0))    (HOLD RWL BUSYLNeg   (20))    (WIDTH (negedge RWL) (25))    (WIDTH (negedge AL0) (35))    (WIDTH (posedge AL0) (35))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(60)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(35))))</TIMING></FMFTIME><FMFTIME>IDT71421LA55J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA55J <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA55PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA55PF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA55TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA55TF<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA55JI <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA55JI <SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA55PFI<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA55PFI<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421LA55TFI<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE>IDT71421SA55TFI<SOURCE>Integrated Device Technology 71421_DS_7746, MARCH 1999</SOURCE><COMMENT>The values listed are for Vcc =4.5V to 5.5V, Cout = 10pf Ta= -40 to +85 Celsius</COMMENT><TIMING>  (DELAY (ABSOLUTE    (IOPATH AL0 IOL0 (18.3:36.7:55) (18.3:36.7:55))    (IOPATH CELNeg IOL0 () () (8.3:16.7:25) (18.3:36.7:55) (8.3:16.7:25) (18.3:36.7:55))    (IOPATH OELNeg IOL0 () () (8.3:16.7:25) (8.3:16.7:25) (8.3:16.7:25) (8.3:16.7:25))    (IOPATH RWL INTRNeg () () (15:30:45) () () (15:30:45))    (IOPATH RWL IOL0 () () (10:20:30) (0:2:4) (10:20:30) (0:2:4))  ))  (TIMINGCHECK    (SETUP AL0 CELNeg    (40))    (SETUP AL0 RWL       (0))    (SETUP AL0 OELNeg    (0))    (SETUP CELNeg RWL    (40))    (SETUP IOL0 RWL      (20))    (SETUP BUSYRNeg RWL  (0))    (HOLD IOL0 RWL       (0))    (HOLD AL0 CELNeg      (0))    (HOLD RWL BUSYLNeg   (20))    (WIDTH (negedge RWL) (30))    (WIDTH (negedge AL0) (55))    (WIDTH (posedge AL0) (55))  ))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TWDD) (DELAY (ABSOLUTE (DEVICE(80)))))   (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/TDDD) (DELAY (ABSOLUTE (DEVICE(55))))</TIMING></FMFTIME></BODY></FTML>

idt71421.ftm - 源码说明

本页面展示了「VHDL的ram和fifo model code 包含众多的厂家」中的 idt71421.ftm 源码文件，采用 FTM 编程语言编写，共 343 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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