idt71421.vhd

来自「VHDL的ram和fifo model code 包含众多的厂家」· VHDL 代码 · 共 1,531 行 · 第 1/5 页

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            SetupLow        => tsetup_AL0_RWL,            SetupHigh       => tsetup_AL0_RWL,            CheckEnabled    => CELNeg = '0',            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AL_RWL,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AL_RWL            );        VitalSetupHoldCheck (            TestSignal      => ARIn,            TestSignalName  => "AR",            RefSignal       => RWR,            RefSignalName   => "RWR",            SetupLow        => tsetup_AL0_RWL,            SetupHigh       => tsetup_AL0_RWL,            CheckEnabled    => CELNeg = '0',            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AR_RWR,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AR_RWR            );        VitalSetupHoldCheck (            TestSignal      => ALIn,            TestSignalName  => "AL",            RefSignal       => CELNeg,            RefSignalName   => "CELNeg",            SetupLow        => tsetup_AL0_RWL,            SetupHigh       => tsetup_AL0_RWL,            CheckEnabled    => RWL = '0',            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AL_CELNeg,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AL_CELNeg            );        VitalSetupHoldCheck (            TestSignal      => ARIn,            TestSignalName  => "AR",            RefSignal       => CERNeg,            RefSignalName   => "CERNeg",            SetupLow        => tsetup_AL0_RWL,            SetupHigh       => tsetup_AL0_RWL,            CheckEnabled    => RWR = '0',            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AR_CERNeg,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AR_CERNeg            );        VitalSetupHoldCheck (            TestSignal      => ALIn,            TestSignalName  => "AL",            RefSignal       => CELNeg,            RefSignalName   => "CELNeg",            SetupLow        => tsetup_AL0_CELNeg,            SetupHigh       => tsetup_AL0_CELNeg,            HoldLow         => thold_AL0_CELNeg,            HoldHigh        => thold_AL0_CELNeg,            CheckEnabled    => RWL = '0',            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AL_CELNeg_s,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AL_CELNeg_s            );        VitalSetupHoldCheck (            TestSignal      => ARIn,            TestSignalName  => "AR",            RefSignal       => CELNeg,            RefSignalName   => "CELNeg",            SetupLow        => tsetup_AL0_CELNeg,            SetupHigh       => tsetup_AL0_CELNeg,            HoldLow         => thold_AL0_CELNeg,            HoldHigh        => thold_AL0_CELNeg,            CheckEnabled    => RWR = '0',            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AR_CERNeg_s,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AR_CERNeg_s            );        VitalSetupHoldCheck (            TestSignal      => ALIn,            TestSignalName  => "AL",            RefSignal       => RWL,            RefSignalName   => "RWL",            SetupLow        => tsetup_AL0_CELNeg,            SetupHigh       => tsetup_AL0_CELNeg,            HoldLow         => thold_AL0_CELNeg,            HoldHigh        => thold_AL0_CELNeg,            CheckEnabled    => CELNeg = '0',            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AL_RWL_s,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AL_RWL_s            );        VitalSetupHoldCheck (            TestSignal      => ARIn,            TestSignalName  => "AR",            RefSignal       => RWR,            RefSignalName   => "RWR",            SetupLow        => tsetup_AL0_CELNeg,            SetupHigh       => tsetup_AL0_CELNeg,            HoldLow         => thold_AL0_CELNeg,            HoldHigh        => thold_AL0_CELNeg,            CheckEnabled    => CERNeg = '0',            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AR_RWR_s,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AR_RWR_s            );        VitalSetupHoldCheck (            TestSignal      => ALIn,            TestSignalName  => "AL",            RefSignal       => OELNeg,            RefSignalName   => "OELNeg",            SetupLow        => tsetup_AL0_OELNeg,            SetupHigh       => tsetup_AL0_OELNeg,            CheckEnabled    => INTRNeg_t = '0',            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AL_OELNeg,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AL_OELNeg            );        VitalSetupHoldCheck (            TestSignal      => ARIn,            TestSignalName  => "AR",            RefSignal       => OERNeg,            RefSignalName   => "OERNeg",            SetupLow        => tsetup_AL0_OELNeg,            SetupHigh       => tsetup_AL0_OELNeg,            CheckEnabled    => INTLNeg_t = '0',            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_AR_OERNeg,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_AR_OERNeg            );        VitalSetupHoldCheck (            TestSignal      => CELNeg,            TestSignalName  => "CELNeg",            RefSignal       => RWL,            RefSignalName   => "RWL",            SetupLow        => tsetup_CELNeg_RWL,            CheckEnabled    => LWrite = '1',            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_CELNeg_RWL,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_CELNeg_RWL            );        VitalSetupHoldCheck (            TestSignal      => BUSYRNeg,            TestSignalName  => "BUSYRNeg",            RefSignal       => RWL,            RefSignalName   => "RWL",            SetupLow        => tsetup_BUSYRNeg_RWL,            CheckEnabled    => TRUE,            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_BUSYRNeg_RWL,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_BUSYRNeg_RWL            );        VitalSetupHoldCheck (            TestSignal      => BUSYLNeg,            TestSignalName  => "BUSYLNeg",            RefSignal       => RWR,            RefSignalName   => "RWR",            SetupLow        => tsetup_BUSYRNeg_RWL,            CheckEnabled    => TRUE,            RefTransition   => '\',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_BUSYLNeg_RWR,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_BUSYLNeg_RWR            );        VitalSetupHoldCheck (            TestSignal      => CERNeg,            TestSignalName  => "CERNeg",            RefSignal       => RWR,            RefSignalName   => "RWR",            SetupLow        => tsetup_CELNeg_RWL,            CheckEnabled    => RWrite = '1',            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_CERNeg_RWR,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_CERNeg_RWR            );        VitalSetupHoldCheck (            TestSignal      => RWL,            TestSignalName  => "RWL",            RefSignal       => BUSYLNeg,            RefSignalName   => "BUSYLNeg",            HoldLow         => thold_RWL_BUSYLNeg,            CheckEnabled    => TRUE,            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_RWL_BUSYLNeg,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_RWL_BUSYLNeg            );        VitalSetupHoldCheck (            TestSignal      => RWR,            TestSignalName  => "RWR",            RefSignal       => BUSYRNeg,            RefSignalName   => "BUSYRNeg",            HoldLow         => thold_RWL_BUSYLNeg,            CheckEnabled    => TRUE,            RefTransition   => '/',            HeaderMsg       => InstancePath & partID,            TimingData      => TD_RWR_BUSYRNeg,            XOn             => XOn,            MsgOn           => MsgOn,            Violation       => Tviol_RWR_BUSYRNeg            );        VitalPeriodPulseCheck (            TestSignal       => CELNeg,            TestSignalName   => "CELNeg",            PulseWidthLow    => tsetup_CELNeg_RWL,            CheckEnabled     => RWL = '0',            HeaderMsg        => InstancePath & PartID,            PeriodData       => PD_CELNeg,            XOn              => XOn,            MsgOn            => MsgOn,            Violation        => Pviol_CELNeg            );        VitalPeriodPulseCheck (            TestSignal       => CERNeg,            TestSignalName   => "CERNeg",            PulseWidthLow    => tsetup_CELNeg_RWL,            CheckEnabled     => RWR = '0',            HeaderMsg        => InstancePath & PartID,            PeriodData       => PD_CERNeg,            XOn              => XOn,            MsgOn            => MsgOn,            Violation        => Pviol_CERNeg            );        VitalPeriodPulseCheck (            TestSignal       => RWL,            TestSignalName   => "RWL",            PulseWidthLow    => tpw_RWL_negedge,            CheckEnabled     => CELNeg = '0',            HeaderMsg        => InstancePath & PartID,            PeriodData       => PD_RWL,            XOn              => XOn,            MsgOn            => MsgOn,            Violation        => Pviol_RWL            );        VitalPeriodPulseCheck (            TestSignal       => RWR,            TestSignalName   => "RWR",            PulseWidthLow    => tpw_RWL_negedge,            CheckEnabled     => CERNeg = '0',            HeaderMsg        => InstancePath & PartID,            PeriodData       => PD_RWR,            XOn              => XOn,            MsgOn            => MsgOn,            Violation        => Pviol_RWR            );        VitalPeriodPulseCheck (            TestSignal       => ALIn(0),            TestSignalName   => "Address 0",            PulseWidthLow    => tpw_AL0_negedge,            PulseWidthHigh   => tpw_AL0_posedge,            CheckEnabled     => TRUE,

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