idt703599.vhd

来自「VHDL的ram和fifo model code 包含众多的厂家」· VHDL 代码 · 共 1,282 行 · 第 1/5 页

            ALIn(0) =>  AL0_ipd,
            ALIn(1) =>  AL1_ipd,
            ALIn(2) =>  AL2_ipd,
            ALIn(3) =>  AL3_ipd,
            ALIn(4) =>  AL4_ipd,
            ALIn(5) =>  AL5_ipd,
            ALIn(6) =>  AL6_ipd,
            ALIn(7) =>  AL7_ipd,
            ALIn(8) =>  AL8_ipd,
            ALIn(9) =>  AL9_ipd,
            ALIn(10) =>  AL10_ipd,
            ALIn(11) =>  AL11_ipd,
            ALIn(12) =>  AL12_ipd,
            ALIn(13) =>  AL13_ipd,
            ALIn(14) =>  AL14_ipd,
            ALIn(15) =>  AL15_ipd,
            ALIn(16) =>  AL16_ipd,
            ARIn(0) =>  AR0_ipd,
            ARIn(1) =>  AR1_ipd,
            ARIn(2) =>  AR2_ipd,
            ARIn(3) =>  AR3_ipd,
            ARIn(4) =>  AR4_ipd,
            ARIn(5) =>  AR5_ipd,
            ARIn(6) =>  AR6_ipd,
            ARIn(7) =>  AR7_ipd,
            ARIn(8) =>  AR8_ipd,
            ARIn(9) =>  AR9_ipd,
            ARIn(10) =>  AR10_ipd,
            ARIn(11) =>  AR11_ipd,
            ARIn(12) =>  AR12_ipd,
            ARIn(13) =>  AR13_ipd,
            ARIn(14) =>  AR14_ipd,
            ARIn(15) =>  AR15_ipd,
            ARIn(16) =>  AR16_ipd,
            IOL0In(0) => IOL0_ipd,
            IOL0In(1) => IOL1_ipd,
            IOL0In(2) => IOL2_ipd,
            IOL0In(3) => IOL3_ipd,
            IOL0In(4) => IOL4_ipd,
            IOL0In(5) => IOL5_ipd,
            IOL0In(6) => IOL6_ipd,
            IOL0In(7) => IOL7_ipd,
            IOL0In(8) => IOL8_ipd,
            IOL1In(0) => IOL9_ipd,
            IOL1In(1) => IOL10_ipd,
            IOL1In(2) => IOL11_ipd,
            IOL1In(3) => IOL12_ipd,
            IOL1In(4) => IOL13_ipd,
            IOL1In(5) => IOL14_ipd,
            IOL1In(6) => IOL15_ipd,
            IOL1In(7) => IOL16_ipd,
            IOL1In(8) => IOL17_ipd,
            IOL2In(0) => IOL18_ipd,
            IOL2In(1) => IOL19_ipd,
            IOL2In(2) => IOL20_ipd,
            IOL2In(3) => IOL21_ipd,
            IOL2In(4) => IOL22_ipd,
            IOL2In(5) => IOL23_ipd,
            IOL2In(6) => IOL24_ipd,
            IOL2In(7) => IOL25_ipd,
            IOL2In(8) => IOL26_ipd,
            IOL3In(0) => IOL27_ipd,
            IOL3In(1) => IOL28_ipd,
            IOL3In(2) => IOL29_ipd,
            IOL3In(3) => IOL30_ipd,
            IOL3In(4) => IOL31_ipd,
            IOL3In(5) => IOL32_ipd,
            IOL3In(6) => IOL33_ipd,
            IOL3In(7) => IOL34_ipd,
            IOL3In(8) => IOL35_ipd,
            IOR0In(0) => IOR0_ipd,
            IOR0In(1) => IOR1_ipd,
            IOR0In(2) => IOR2_ipd,
            IOR0In(3) => IOR3_ipd,
            IOR0In(4) => IOR4_ipd,
            IOR0In(5) => IOR5_ipd,
            IOR0In(6) => IOR6_ipd,
            IOR0In(7) => IOR7_ipd,
            IOR0In(8) => IOR8_ipd,
            IOR1In(0) => IOR9_ipd,
            IOR1In(1) => IOR10_ipd,
            IOR1In(2) => IOR11_ipd,
            IOR1In(3) => IOR12_ipd,
            IOR1In(4) => IOR13_ipd,
            IOR1In(5) => IOR14_ipd,
            IOR1In(6) => IOR15_ipd,
            IOR1In(7) => IOR16_ipd,
            IOR1In(8) => IOR17_ipd,
            IOR2In(0) => IOR18_ipd,
            IOR2In(1) => IOR19_ipd,
            IOR2In(2) => IOR20_ipd,
            IOR2In(3) => IOR21_ipd,
            IOR2In(4) => IOR22_ipd,
            IOR2In(5) => IOR23_ipd,
            IOR2In(6) => IOR24_ipd,
            IOR2In(7) => IOR25_ipd,
            IOR2In(8) => IOR26_ipd,
            IOR3In(0) => IOR27_ipd,
            IOR3In(1) => IOR28_ipd,
            IOR3In(2) => IOR29_ipd,
            IOR3In(3) => IOR30_ipd,
            IOR3In(4) => IOR31_ipd,
            IOR3In(5) => IOR32_ipd,
            IOR3In(6) => IOR33_ipd,
            IOR3In(7) => IOR34_ipd,
            IOR3In(8) => IOR35_ipd,
            IOL0Out(0) => IOL0,
            IOL0Out(1) => IOL1,
            IOL0Out(2) => IOL2,
            IOL0Out(3) => IOL3,
            IOL0Out(4) => IOL4,
            IOL0Out(5) => IOL5,
            IOL0Out(6) => IOL6,
            IOL0Out(7) => IOL7,
            IOL0Out(8) => IOL8,
            IOL1Out(0) => IOL9,
            IOL1Out(1) => IOL10,
            IOL1Out(2) => IOL11,
            IOL1Out(3) => IOL12,
            IOL1Out(4) => IOL13,
            IOL1Out(5) => IOL14,
            IOL1Out(6) => IOL15,
            IOL1Out(7) => IOL16,
            IOL1Out(8) => IOL17,
            IOL2Out(0) => IOL18,
            IOL2Out(1) => IOL19,
            IOL2Out(2) => IOL20,
            IOL2Out(3) => IOL21,
            IOL2Out(4) => IOL22,
            IOL2Out(5) => IOL23,
            IOL2Out(6) => IOL24,
            IOL2Out(7) => IOL25,
            IOL2Out(8) => IOL26,
            IOL3Out(0) => IOL27,
            IOL3Out(1) => IOL28,
            IOL3Out(2) => IOL29,
            IOL3Out(3) => IOL30,
            IOL3Out(4) => IOL31,
            IOL3Out(5) => IOL32,
            IOL3Out(6) => IOL33,
            IOL3Out(7) => IOL34,
            IOL3Out(8) => IOL35,
            IOR0Out(0) => IOR0,
            IOR0Out(1) => IOR1,
            IOR0Out(2) => IOR2,
            IOR0Out(3) => IOR3,
            IOR0Out(4) => IOR4,
            IOR0Out(5) => IOR5,
            IOR0Out(6) => IOR6,
            IOR0Out(7) => IOR7,
            IOR0Out(8) => IOR8,
            IOR1Out(0) => IOR9,
            IOR1Out(1) => IOR10,
            IOR1Out(2) => IOR11,
            IOR1Out(3) => IOR12,
            IOR1Out(4) => IOR13,
            IOR1Out(5) => IOR14,
            IOR1Out(6) => IOR15,
            IOR1Out(7) => IOR16,
            IOR1Out(8) => IOR17,
            IOR2Out(0) => IOR18,
            IOR2Out(1) => IOR19,
            IOR2Out(2) => IOR20,
            IOR2Out(3) => IOR21,
            IOR2Out(4) => IOR22,
            IOR2Out(5) => IOR23,
            IOR2Out(6) => IOR24,
            IOR2Out(7) => IOR25,
            IOR2Out(8) => IOR26,
            IOR3Out(0) => IOR27,
            IOR3Out(1) => IOR28,
            IOR3Out(2) => IOR29,
            IOR3Out(3) => IOR30,
            IOR3Out(4) => IOR31,
            IOR3Out(5) => IOR32,
            IOR3Out(6) => IOR33,
            IOR3Out(7) => IOR34,
            IOR3Out(8) => IOR35,
            OPTRIn    => OPTR_ipd,
            OPTLIn    => OPTL_ipd,
            RWLIn     => RWL_ipd,
            RWRIn     => RWR_ipd,
            OELNegIn  => OELNeg_ipd,
            OERNegIn  => OERNeg_ipd,
            BE3RNegIn  => BE3RNeg_ipd,
            BE2RNegIn  => BE2RNeg_ipd,
            BE1RNegIn  => BE1RNeg_ipd,
            BE0RNegIn  => BE0RNeg_ipd,
            BE3LNegIn  => BE3LNeg_ipd,
            BE2LNegIn  => BE2LNeg_ipd,
            BE1LNegIn  => BE1LNeg_ipd,
            BE0LNegIn  => BE0LNeg_ipd,
            CE0LNegIn  => CE0LNeg_ipd,
            CE0RNegIn  => CE0RNeg_ipd,
            CE1LIn  => CE1L_ipd,
            CE1RIn  => CE1R_ipd,
            CLKLIn  => CLKL_ipd,
            CLKRIn  => CLKR_ipd,
            REPEATLNegIn  => REPEATLNeg_ipd,
            REPEATRNegIn  => REPEATRNeg_ipd,
            CNTENRNegIn  => CNTENRNeg_ipd,
            CNTENLNegIn  => CNTENLNeg_ipd,
            ADSRNegIn  => ADSRNeg_ipd,
            ADSLNegIn  => ADSLNeg_ipd,
            PIPELIn   => to_UX01(PIPEL_ipd),
            PIPERIn   => to_UX01(PIPER_ipd),
            TDIIn   => to_UX01(TDI_ipd),
            TCKIn   => to_UX01(TCK_ipd),
            TMSIn   => to_UX01(TMS_ipd),
            TRSTNegIn   => to_UX01(TRSTNeg_ipd)
        );

        SIGNAL IOL3_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOL2_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOL1_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOL0_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOR3_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOR2_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOR1_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL IOR0_zd      : std_logic_vector(HiDbit DOWNTO 0);
        SIGNAL BSR_READ     : boolean := false;
        SIGNAL Tri_Outs     : boolean := false;
        SIGNAL EXTST        : boolean := false;
        SIGNAL bsr          : std_logic_vector(bsr_size - 1 downto 0) :=
                                  (OTHERS => '0');

    BEGIN

        ------------------------------------------------------------------------
        -- Behavior Process
        ------------------------------------------------------------------------
        Memory : PROCESS (OELNegIn, OERNegIn, RWLIn, RWRIn, CE0LNegIn,
                          CE0RNegIn, ALIn, ARIn, IOL0In, IOR0In, CE1LIn, CE1RIn,
                          CLKLIn, CLKRIn, REPEATLNegIn, REPEATRNegIn,
                          CNTENRNegIn, CNTENLNegIn, ADSRNegIn, ADSLNegIn,
                          PIPERIn, PIPELIn, IOL1In, IOR1In, BE1RNegIn,
                          BE1LNegIn, BE0RNegIn, BE0LNegIn, IOL2In, IOR2In,
                          IOL3In, IOR3In, BE2RNegIn, BE2LNegIn, BE3RNegIn,
                          BE3LNegIn, BSR_READ, Tri_Outs)

            -- Timing Check Variables
            VARIABLE Tviol_ALIn_CLKLIn         : X01 := '0';
            VARIABLE TD_ALIn_CLKLIn            : VitalTimingDataType;

            VARIABLE Tviol_ARIn_CLKRIn         : X01 := '0';
            VARIABLE TD_ARIn_CLKRIn            : VitalTimingDataType;

            VARIABLE Tviol_CE0LNegIn_CLKLIn    :  X01 := '0';
            VARIABLE TD_CE0LNegIn_CLKLIn       : VitalTimingDataType;

            VARIABLE Tviol_CE0RNegIn_CLKRIn    :  X01 := '0';
            VARIABLE TD_CE0RNegIn_CLKRIn       : VitalTimingDataType;

            VARIABLE Tviol_CE1LIn_CLKLIn       :  X01 := '0';
            VARIABLE TD_CE1LIn_CLKLIn          : VitalTimingDataType;

            VARIABLE Tviol_CE1RIn_CLKRIn       :  X01 := '0';