mt48lc4m16.vhd
来自「VHDL的ram和fifo model code 包含众多的厂家」· VHDL 代码 · 共 1,475 行 · 第 1/5 页
VHD
1,475 行
Violation := Pviol_CLK OR Tviol_BA_CLK OR Tviol_DQML_CLK OR Tviol_DQMH_CLK OR Tviol_CKE_CLK OR Tviol_Address_CLK OR Tviol_WENeg_CLK OR Tviol_RASNeg_CLK OR Tviol_CSNeg_CLK OR Tviol_CASNeg_CLK; ASSERT Violation = '0' REPORT InstancePath & partID & ": simulation may be" & " inaccurate due to timing violations" SEVERITY SeverityMode; END IF; -- Timing Check Section -------------------------------------------------------------------- -- Functional Section -------------------------------------------------------------------- IF (rising_edge(CLKIn)) THEN CKEreg <= CKE_nwv; IF (NOW > Next_Ref AND PoweredUp AND Ref_Cnt > 0) THEN Ref_Cnt := Ref_Cnt - 1; Next_Ref := NOW + tdevice_REF; END IF; IF CKEreg = '1' THEN IF CSNegIn = '0' THEN chip_en := true; ELSE chip_en := false; END IF; END IF; END IF; IF (rising_edge(CLKIn) AND CKEreg = '1' AND to_X01(CSNegIn) = '1') THEN command := nop; ELSIF (rising_edge(CLKIn) AND CKEreg = '1' AND to_X01(CSNegIn) = '0') THEN ASSERT (not(Is_X(WENegIn))) REPORT InstancePath & partID & ": Unusable value for WENeg" SEVERITY SeverityMode; ASSERT (not(Is_X(RASNegIn))) REPORT InstancePath & partID & ": Unusable value for RASNeg" SEVERITY SeverityMode; ASSERT (not(Is_X(CASNegIn))) REPORT InstancePath & partID & ": Unusable value for CASNeg" SEVERITY SeverityMode; -- Command Decode IF ((RASNegIn = '1') AND (CASNegIn = '1') AND (WENegIn = '1')) THEN command := nop; ELSIF ((RASNegIn = '0') AND (CASNegIn = '1') AND (WENegIn = '1')) THEN command := act; ELSIF ((RASNegIn = '1') AND (CASNegIn = '0') AND (WENegIn = '1')) THEN command := read; ELSIF ((RASNegIn = '1') AND (CASNegIn = '0') AND (WENegIn = '0')) THEN command := writ; ELSIF ((RASNegIn = '1') AND (CASNegIn = '1') AND (WENegIn = '0')) THEN command := bst; ELSIF ((RASNegIn = '0') AND (CASNegIn = '1') AND (WENegIn = '0')) THEN command := pre; ELSIF ((RASNegIn = '0') AND (CASNegIn = '0') AND (WENegIn = '1')) THEN command := ref; ELSIF ((RASNegIn = '0') AND (CASNegIn = '0') AND (WENegIn = '0')) THEN command := mrs; END IF; -- PowerUp Check IF (NOT(PoweredUp) AND command /= nop) THEN ASSERT false REPORT InstancePath & partID & ": Incorrect power up. Command" & " issued before power up complete." SEVERITY SeverityMode; END IF; -- Bank Decode CASE BAIn IS WHEN "00" => cur_bank := 0; BankString := " Bank-0 "; WHEN "01" => cur_bank := 1; BankString := " Bank-1 "; WHEN "10" => cur_bank := 2; BankString := " Bank-2 "; WHEN "11" => cur_bank := 3; BankString := " Bank-3 "; WHEN others => ASSERT false REPORT InstancePath & partID & ": Could not decode bank" & " selection - results may be incorrect." SEVERITY SeverityMode; END CASE; END IF; IF (rising_edge(CLKIn) AND CKEreg = '1') THEN ASSERT (not(Is_X(CSNegIn))) REPORT InstancePath & partID & ": Unusable value for CSNeg" SEVERITY SeverityMode; IF (CSNegIn = '1') THEN command := nop; END IF; -- by default data drive is Z, might get over written in one -- of the passes below DataDriveL := (OTHERS => 'Z'); DataDriveH := (OTHERS => 'Z'); -- The Big State Machine banks : FOR bank IN 0 TO hi_bank LOOP CASE statebank(bank) IS WHEN pwron => IF (PoweredUp = false) THEN ASSERT (command = nop) REPORT InstancePath & partID & BankString &": Only NOPs allowed" & " during power up." SEVERITY SeverityMode; DataDriveL := (OTHERS => 'Z'); DataDriveH := (OTHERS => 'Z'); ELSIF (command = pre) AND ((cur_bank = bank) OR (AddressIn(10) = '1')) THEN statebank(bank) <= precharge, idle AFTER tdevice_TRP; END IF; WHEN precharge => IF cur_bank = bank THEN -- It is only an error if this bank is selected ASSERT (command = nop OR command = pre) REPORT InstancePath & partID & BankString &": Illegal command received" & " during precharge." SEVERITY SeverityMode; END IF; WHEN idle => IF (command = nop OR command = bst OR command = pre) OR (cur_bank /= bank) THEN null; ELSIF (command = mrs) THEN IF (statebank = idle & idle & idle & idle) THEN ModeReg := AddressIn; statebank <= mode_set & mode_set & mode_set & mode_set; END IF; ELSIF (command = ref) THEN IF (statebank = idle & idle & idle & idle) THEN IF (CKEIn = '1') THEN statebank(bank) <= auto_refresh, idle AFTER tdevice_TRFC; ELSE statebank(bank) <= self_refresh; END IF; END IF; ELSIF (command = act) THEN statebank(bank) <= bank_act; ras_in(bank) <= '1', '0' AFTER 70 ns; rct_in <= '1', '0' AFTER 10 ps; rcdt_in(bank) <= '1', '0' AFTER 10 ps; MemAddr(bank)(HiAddrBit+HiColBit+1 downto HiColBit +1) := AddressIn; -- latch row addr ELSE ASSERT false REPORT InstancePath & partID & ": Illegal command" & " received in idle state." SEVERITY SeverityMode; END IF; WHEN mode_set => statebank <= idle & idle & idle & idle; ASSERT (ModeReg(7) = '0')-- AND ModeReg(8) ='0') REPORT InstancePath & partID & BankString &": Illegal operating mode set." SEVERITY SeverityMode; ASSERT command = nop REPORT InstancePath & partID & BankString & ": Illegal command received during mode_set." SEVERITY SeverityMode; -- read burst length IF (ModeReg(2 downto 0) = "000") THEN Burst_Length := 1; Burst_Bits := 0; ELSIF (ModeReg(2 downto 0) = "001") THEN Burst_Length := 2; Burst_Bits := 1; ELSIF (ModeReg(2 downto 0) = "010") THEN Burst_Length := 4; Burst_Bits := 2; ELSIF (ModeReg(2 downto 0) = "011") THEN Burst_Length := 8; Burst_Bits := 3; ELSE ASSERT false REPORT InstancePath & partID & BankString &": Invalid burst length specified." SEVERITY SeverityMode; END IF; -- read burst type IF (ModeReg(3) = '0') THEN Burst := sequential; ELSIF (ModeReg(3) = '1') THEN Burst := interleave; ELSE ASSERT false REPORT InstancePath & partID & BankString &": Invalid burst type specified." SEVERITY SeverityMode; END IF; -- read CAS latency IF (ModeReg(6 downto 4) = "010") THEN CAS_Lat <= 2; ASSERT TimingModel(16) /= '6' REPORT "CAS Latency 2 is NOT allowed for this "& "TimingModel" SEVERITY warning; ELSIF (ModeReg(6 downto 4) = "110") THEN CAS_Lat <= 3; ELSE ASSERT false REPORT InstancePath & partID & BankString & ": CAS Latency set incorrecty " SEVERITY SeverityMode; END IF; -- read write burst mode IF (ModeReg(9) = '0') THEN WB := programmed; ELSIF (ModeReg(9) = '1') THEN WB := single; ELSE ASSERT false REPORT InstancePath & partID & BankString & ": Invalid burst type specified." SEVERITY SeverityMode; END IF; WHEN auto_refresh => IF (Ref_Cnt < 8192) THEN Ref_Cnt := Ref_Cnt + 1; END IF; ASSERT command = nop REPORT InstancePath & partID & BankString & ": Illegal command received during auto_refresh." SEVERITY SeverityMode; WHEN bank_act => IF (command = pre) AND ((cur_bank = bank) OR (AddressIn(10) = '1')) THEN ASSERT ras_out(bank) = '1' REPORT InstancePath & partID & BankString & ": precharge command" & " does not meet tRAS time." SEVERITY SeverityMode; statebank(bank) <= precharge, idle AFTER tdevice_TRP; ELSIF (command = nop OR command = bst) OR (cur_bank /= bank) THEN null; ELSIF (command = read) THEN ASSERT rcdt_out(bank) = '0' REPORT InstancePath & partID & BankString & ": read command received too soon after active." SEVERITY SeverityMode; ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1')) REPORT InstancePath & partID & BankString & ": AddressIn(10) = X" & " during read command. Next state unknown." SEVERITY SeverityMode; FixColumnAddress(bank); ReadFromMem(bank); Burst_Cnt(bank) := 1; IF (AddressIn(10) = '0') THEN statebank(bank) <= read; ELSIF (AddressIn(10) = '1') THEN statebank(bank) <= read_auto_pre; END IF; ELSIF (command = writ) THEN ASSERT rcdt_out(bank) = '0' REPORT InstancePath & partID & BankString & ": write command" & " received too soon after active." SEVERITY SeverityMode; ASSERT ((AddressIn(10) = '0') OR (AddressIn(10) = '1')) REPORT InstancePath & partID & BankString & ": AddressIn(10) = X" & " during write command. Next state unknown." SEVERITY SeverityMode; FixColumnAddress(bank); WriteToMem(bank); Burst_Cnt(bank) := 1; IF (AddressIn(10) = '0') THEN statebank(bank) <= write; ELSIF (AddressIn(10) = '1') THEN statebank(bank) <= write_auto_pre; END IF;
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