fifo7881.vhd

VHDL的ram和fifo model code 包含众多的厂家

                TestSignalName  => "RSNeg_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK",
                SetupLow        =>  tsetup_RSNeg_RCLK,
                HoldLow         =>  thold_RSNeg_RCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_RSNeg_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_RSNeg_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  DAFNeg_ipd,
                TestSignalName  => "DAFNeg_ipd",
                RefSignal       =>  RSNeg_ipd,
                RefSignalName   =>  "RSNeg",
                SetupLow        =>  tsetup_DAFNeg_RSNeg,
                SetupHigh       =>  tsetup_DAFNeg_RSNeg,
                HoldLow         =>  thold_DAFNeg_RSNeg,
                HoldHigh        =>  thold_DAFNeg_RSNeg,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_DAFNeg_RSNeg,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_DAFNeg_RSNeg );

            VitalPeriodPulseCheck (
                TestSignal      =>  WCLK_ipd,
                TestSignalName  =>  "WCLK_ipd",
                Period          =>  tperiod_RCLK_posedge,
                PulseWidthHigh  =>  tpw_WCLK_posedge,
                PulseWidthLow   =>  tpw_WCLK_negedge,
                PeriodData      =>  PD_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Pviol_WCLK,
                HeaderMsg       =>  InstancePath & "/fifo7881",
                CheckEnabled    =>  TRUE );

            VitalPeriodPulseCheck (
                TestSignal      =>  RCLK_ipd,
                TestSignalName  =>  "RCLK_ipd",
                Period          =>  tperiod_RCLK_posedge,
                PulseWidthHigh  =>  tpw_RCLK_posedge,
                PulseWidthLow   =>  tpw_RCLK_negedge,
                PeriodData      =>  PD_RCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Pviol_RCLK,
                HeaderMsg       =>  InstancePath & "/fifo7881",
                CheckEnabled    =>  TRUE );

            VitalPeriodPulseCheck (
                TestSignal      =>  DAFNeg_ipd,
                TestSignalName  =>  "DAFNeg_ipd",
                PulseWidthHigh  =>  tpw_DAFNeg_posedge,
                PeriodData      =>  PD_DAFNeg,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Pviol_DAFNeg,
                HeaderMsg       =>  InstancePath & "/fifo7881",
                CheckEnabled    =>  TRUE );


        END IF; -- Timing Check Section


        d := (D17_ipd, D16_ipd, D15_ipd, D14_ipd, D13_ipd, D12_ipd, D11_ipd, 
              D10_ipd, D9_ipd, D8_ipd, D7_ipd, D6_ipd, D5_ipd, D4_ipd, D3_ipd,
              D2_ipd, D1_ipd, D0_ipd);

        d := To_X01(d);
    ----------------------------------------------------------------------------
    -- Define the AE and AF offset values
    ----------------------------------------------------------------------------

    IF ((DAFNeg_ipd'EVENT) AND (To_X01(DAFNeg_ipd) = '0')) THEN

       FOR i IN 17 DOWNTO 9 LOOP
          d_temp(i) := '0' ;
       END LOOP ;

        ae_offset := to_nat(d_temp) ;
        af_offset := to_nat(d_temp) ;
    END IF ;

    ----------------------------------------------------------------------------
    -- Program the AE and AF offsets to the default value of X = 256
    ----------------------------------------------------------------------------


    IF ((RSNeg_ipd'EVENT) AND (To_X01(RSNeg_ipd) = '1') AND 
         (To_X01(DAFNeg_ipd) = '1') AND (rst = 1)) THEN
        ae_offset := 256 ;
        af_offset := 256 ;
    END IF ;

    ----------------------------------------------------------------------------
    -- Reset FIFO
    ----------------------------------------------------------------------------

    IF ((RSNeg_ipd'EVENT) AND (To_X01(RSNeg_ipd) = '0')) THEN
        flagstate := "X10X" ;
        wordcounter := 0 ;
        waddr := 0 ;
        raddr := 0 ;
        rst := 1 ;
        rdclkcount := 0 ;
        wrtclkcount := 0 ;
        orflag := 0 ;
        irflag := 0 ;

        ORF_zd := flagstate(0) ;
        AF_zd  := flagstate(1) ;
        HF_zd  := flagstate(2) ;
        IRF_zd := flagstate(3) ;
        wordcount <= wordcounter ;
    END IF ;

    IF ((To_X01(RSNeg_ipd) = '0') AND (RCLK_ipd'EVENT) AND 
            (To_X01(RCLK_ipd) = '1') AND (rst = 1)) THEN
        rdclkcount := rdclkcount + 1 ;
        d_temp := TO_X01(d) ;

        CASE rdclkcount IS
            WHEN 1 => NULL ;
            WHEN 2 => NULL ;
            WHEN 3 =>
                     flagstate := "0100" ;
                     ORF_zd := flagstate(0) ;
            WHEN 4 => NULL ;
            WHEN OTHERS => NULL ;
       END CASE ;
    END IF ;

    IF ((To_X01(RSNeg_ipd) = '0') AND (WCLK_ipd'EVENT) AND 
          (To_X01(WCLK_ipd) = '1') AND (rst = 1)) THEN
        wrtclkcount := wrtclkcount + 1 ;
        d_temp := TO_X01(d) ;

        CASE wrtclkcount IS
             WHEN 1 => NULL ;
             WHEN 2 =>
                      flagstate := "X100" ;
                      IRF_zd := flagstate(3) ;
             WHEN 3 => NULL ;
             WHEN 4 => NULL ;
             WHEN OTHERS => NULL ;
        END CASE ;
     END IF ;

    ------------------------------------------------------------------------
    -- Program the values for the AE and AF flags
    ------------------------------------------------------------------------

    IF ((RSNeg_ipd'EVENT) AND (To_X01(RSNeg_ipd) = '1') AND (rst = 1) AND 
        (wrtclkcount >= 4) AND (rdclkcount >= 4)) THEN

        ae_limit := ae_offset ;
        af_limit := 1024 - af_offset ;
        rst := 0 ;
        wrtclkcount := 0 ;
        rdclkcount := 0 ;
    END IF ;

    ------------------------------------------------------------------------
    -- Set q to high impedance
    ------------------------------------------------------------------------

    IF (To_X01(OE_ipd) = '0') THEN
        Q_zd := "ZZZZZZZZZZZZZZZZZZ" ;

    ELSIF ((OE_ipd'EVENT) AND (To_X01(OE_ipd) = '1') AND (raddr = 1)) THEN
        Q_zd := memory(0) ;

    ELSIF ((OE_ipd'EVENT) AND (To_X01(OE_ipd) = '1') AND (raddr > 1)) THEN
        Q_zd := memory(raddr - 1) ;

    END IF ;

    ------------------------------------------------------------------------
    -- Set O_R high on third rdclk after first word has been written 
    -- into empty memory
    ------------------------------------------------------------------------

    IF ((RCLK_ipd'EVENT) AND (To_X01(RCLK_ipd) = '1') AND 
         (To_X01(RSNeg_ipd) = '1') AND (orflag = 0) AND (rst = 0) 
           AND (wordcounter >= 1)) THEN

        rdclkcount := rdclkcount + 1 ;
        d_temp := TO_X01(d) ;

        CASE rdclkcount IS
            WHEN 1 => NULL ;
            WHEN 2 => NULL ;
            WHEN 3 =>
                IF (flagstate = "0101") THEN
                    flagstate := "1101" ;
                    ORF_zd  := flagstate(0) ;
                    orflag := 1 ;
                    rdclkcount := 0 ;

                    IF (To_X01(OE_ipd) /= '0') THEN
                        Q_zd := memory(0) ;
                    END IF ;

                    raddr := raddr + 1 ;
                    wordcounter := wordcounter - 1 ;
                    wordcount <= wordcounter ;
                ELSE
                    flagstate(0) := '1' ;
                    ORF_zd  := flagstate(0) ;
                    orflag := 1 ;
                    rdclkcount := 0 ;

                    IF (To_X01(OE_ipd) /= '0') THEN
                        Q_zd := memory(0) ;
                    END IF ;

                    raddr := raddr + 1 ;
                    wordcounter := wordcounter - 1 ;
                    wordcount <= wordcounter ;

                END IF ;
            WHEN OTHERS => NULL ;
        END CASE ;
    END IF ;

    ------------------------------------------------------------------------
    -- Set IR high on 2nd wrtclk after the 1st valid read when the fifo 
    -- is full
    ------------------------------------------------------------------------

    IF ((WCLK_ipd'EVENT) AND (To_X01(WCLK_ipd) = '1') AND 
       (To_X01(RSNeg_ipd) = '1') AND (irflag = 0) AND (wordcounter > 2) 
       AND (wordcounter <= 1023 ) AND (To_X01(REN1_ipd) = '1') AND (
       To_X01(REN2_ipd) = '1')) THEN

        wrtclkcount := wrtclkcount + 1 ;
        d_temp := TO_X01(d) ;

        CASE wrtclkcount IS
            WHEN 1 => NULL ;
            WHEN 2 =>
                flagstate := "1111" ;
                IRF_zd := flagstate(3) ;
                irflag := 1 ;
                wrtclkcount := 0 ;
            WHEN OTHERS => NULL ;
        END CASE ;

    END IF ;

    ------------------------------------------------------------------------
    -- Data writes to the FIFO
    ------------------------------------------------------------------------

    IF ((WCLK_ipd'EVENT) AND (To_X01(WCLK_ipd) = '1') AND 
        (To_X01(RSNeg_ipd) = '1') AND (To_X01(WEN1_ipd) = '1') AND 
        (To_X01(WEN2_ipd) = '1')) THEN

        IF (irflag = 1) THEN
            IF (waddr < 1024) THEN
                memory(waddr) := To_StdULogicVector(d) ;
                wordcounter := wordcounter + 1;
                wordcount <= wordcounter ;
                waddr := waddr + 1 ;
            ELSIF (waddr = 1024) THEN
                waddr := 0 ;
                memory(waddr) := To_StdULogicVector(d) ;
                wordcounter := wordcounter + 1 ;
                wordcount <= wordcounter ;
            END IF ;
        END IF ;
    END IF ;

    ------------------------------------------------------------------------
    -- Data reads from the FIFO
    ------------------------------------------------------------------------

    IF ((RCLK_ipd'EVENT) AND (To_X01(RCLK_ipd) = '1') AND 
        (To_X01(RSNeg_ipd) = '1') AND (To_X01(REN1_ipd) = '1') AND 
        (To_X01(REN2_ipd) = '1') AND (rst = 0)) THEN

       IF (orflag = 1) AND (wordcount = 0) THEN
           CASE flagstate IS
               WHEN "1101" =>
                   IF (wordcounter = 0) THEN
                       flagstate := "0101" ;
                       orflag := 0 ;
                       irflag := 1 ;

                       ORF_zd := flagstate(0) ;
                       AF_zd  := flagstate(1) ;
                       HF_zd  := flagstate(2) ;
                       IRF_zd := flagstate(3) ;
                   END IF ;
               WHEN OTHERS => NULL ;
           END CASE ;

       ELSIF (orflag = 1) AND (wordcount /= 0) AND (raddr /= 0) THEN
           IF (raddr < 1024) THEN
               wordcounter := wordcounter - 1 ;
               wordcount <= wordcounter ;
               IF (To_X01(OE_ipd) /= '0') THEN
                   Q_zd := memory(raddr) ;
               END IF ;
               raddr := raddr + 1 ;
           ELSIF (raddr = 1024) THEN
               raddr := 0 ;
               wordcounter := wordcounter - 1 ;
               wordcount <= wordcounter ;
               IF (To_X01(OE_ipd) /= '0') THEN
                   Q_zd := memory(raddr) ;
               END IF ;
           END IF ;
       END IF ;