fifo7881.vhd

VHDL的ram和fifo model code 包含众多的厂家

        VARIABLE Tviol_D15_WCLK : X01 := '0';
        VARIABLE TD_D15_WCLK    : VitalTimingDataType;

        VARIABLE Tviol_D16_WCLK : X01 := '0';
        VARIABLE TD_D16_WCLK    : VitalTimingDataType;

        VARIABLE Tviol_D17_WCLK : X01 := '0';
        VARIABLE TD_D17_WCLK    : VitalTimingDataType;

        VARIABLE Tviol_D0_DAFNeg: X01 := '0';
        VARIABLE TD_D0_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D1_DAFNeg: X01 := '0';
        VARIABLE TD_D1_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D2_DAFNeg: X01 := '0';
        VARIABLE TD_D2_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D3_DAFNeg: X01 := '0';
        VARIABLE TD_D3_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D4_DAFNeg: X01 := '0';
        VARIABLE TD_D4_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D5_DAFNeg: X01 := '0';
        VARIABLE TD_D5_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D6_DAFNeg: X01 := '0';
        VARIABLE TD_D6_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D7_DAFNeg: X01 := '0';
        VARIABLE TD_D7_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_D8_DAFNeg: X01 := '0';
        VARIABLE TD_D8_DAFNeg   : VitalTimingDataType;

        VARIABLE Tviol_WEN1_WCLK : X01 := '0';
        VARIABLE TD_WEN1_WCLK    : VitalTimingDataType;

        VARIABLE Tviol_WEN2_WCLK : X01 := '0';
        VARIABLE TD_WEN2_WCLK    : VitalTimingDataType;

        VARIABLE Tviol_REN1_RCLK : X01 := '0';
        VARIABLE TD_REN1_RCLK    : VitalTimingDataType;

        VARIABLE Tviol_REN2_RCLK : X01 := '0';
        VARIABLE TD_REN2_RCLK    : VitalTimingDataType;

        VARIABLE Tviol_OE_RCLK  : X01 := '0';
        VARIABLE TD_OE_RCLK     : VitalTimingDataType;

        VARIABLE Tviol_RSNeg_RCLK  : X01 := '0';
        VARIABLE TD_RSNeg_RCLK     : VitalTimingDataType;

        VARIABLE Tviol_RSNeg_WCLK  : X01 := '0';
        VARIABLE TD_RSNeg_WCLK     : VitalTimingDataType;

        VARIABLE Tviol_DAFNeg_RSNeg: X01 := '0';
        VARIABLE TD_DAFNeg_RSNeg   : VitalTimingDataType;

        VARIABLE PD_RCLK        : VitalPeriodDataType := VitalPeriodDataInit;
        VARIABLE Pviol_RCLK     : X01 := '0';

        VARIABLE PD_WCLK        : VitalPeriodDataType := VitalPeriodDataInit;
        VARIABLE Pviol_WCLK     : X01 := '0';

        VARIABLE PD_DAFNeg      : VitalPeriodDataType := VitalPeriodDataInit;
        VARIABLE Pviol_DAFNeg   : X01 := '0';

        -- Functionality Results Variables
        VARIABLE ORF_zd         : std_ulogic := 'X';
        VARIABLE IRF_zd         : std_ulogic := 'X';
        VARIABLE AF_zd          : std_ulogic := 'X';
        VARIABLE HF_zd          : std_ulogic := 'X';
        VARIABLE Q_zd       : std_ulogic_vector(17 downto 0) := (others => 'X');

        -- Output Glitch Detection Variables
        VARIABLE ORF_GlitchData : VitalGlitchDataType;
        VARIABLE IRF_GlitchData : VitalGlitchDataType;
        VARIABLE AF_GlitchData  : VitalGlitchDataType;
        VARIABLE HF_GlitchData  : VitalGlitchDataType;
        VARIABLE Q_GlitchData   : VitalGlitchDataType;

    BEGIN

        ------------------------------------------------------------------------
        -- Timing Check Section
        ------------------------------------------------------------------------
        IF (TimingChecksOn) THEN

            VitalSetupHoldCheck (
                TestSignal      =>  D0_ipd,
                TestSignalName  => "D0_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D0_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D0_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D1_ipd,
                TestSignalName  => "D1_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D1_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D1_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D2_ipd,
                TestSignalName  => "D2_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D2_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D2_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D3_ipd,
                TestSignalName  => "D3_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D3_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D3_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D4_ipd,
                TestSignalName  => "D4_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D4_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D4_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D5_ipd,
                TestSignalName  => "D5_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D5_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D5_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D6_ipd,
                TestSignalName  => "D6_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D6_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D6_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D7_ipd,
                TestSignalName  => "D7_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D7_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D7_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D8_ipd,
                TestSignalName  => "D8_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D8_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D8_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D9_ipd,
                TestSignalName  => "D9_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D9_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D9_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D10_ipd,
                TestSignalName  => "D10_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D10_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D10_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D11_ipd,
                TestSignalName  => "D11_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D11_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D11_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D12_ipd,
                TestSignalName  => "D12_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,
                RefTransition   =>  '/',
                HeaderMsg       =>  InstancePath & "/fifo7881",
                TimingData      =>  TD_D12_WCLK,
                XOn             =>  XOn,
                MsgOn           =>  MsgOn,
                Violation       =>  Tviol_D12_WCLK );

            VitalSetupHoldCheck (
                TestSignal      =>  D13_ipd,
                TestSignalName  => "D13_ipd",
                RefSignal       =>  WCLK_ipd,
                RefSignalName   =>  "WCLK_ipd",
                SetupHigh       =>  tsetup_D0_WCLK,
                SetupLow        =>  tsetup_D0_WCLK,
                HoldHigh        =>  thold_D0_WCLK,
                HoldLow         =>  thold_D0_WCLK,
                CheckEnabled    =>  TRUE,