idt72845.ftm
来自「VHDL的ram和fifo model code 包含众多的厂家」· FTM 代码 · 共 118 行
FTM
118 行
<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for IDT72845 Parts</TITLE><REVISION.HISTORY>version: | author: | mod date: | changes made: V1.0 R. Munden 99 JUN 15 Initial release</REVISION.HISTORY></HEAD><BODY><TIMESCALE>1ns</TIMESCALE><MODEL>IDT72845<FMFTIME>IDT72845LB10PF<SOURCE>IDT data sheet February 1999</SOURCE><COMMENT>The Values listed are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><COMMENT>No value found for tLDH</COMMENT><TIMING> (DELAY (ABSOLUTE (IOPATH RSNeg EFNeg (3:8:15) (3:8:15)) (IOPATH RCLK EFNeg (2:5:6.5) (2:5:6.5)) (IOPATH RCLK PAENeg (3:9:17) (3:9:17)) (IOPATH RCLK PAFNeg (3:9:17) (3:9:17)) (IOPATH WCLK FFNeg (2:5:6.5) (2:5:6.5)) (IOPATH RCLK WXOHFNeg (3:9:17) (3:9:17)) (IOPATH RCLK RXONeg (2:5:6.5) (2:5:6.5)) (IOPATH RSNeg Q0 (3:8:15) (3:8:15) (3:8:15) (3:8:15) (3:8:15) (3:8:15)) (IOPATH RCLK Q0 (2:5:6.5) (2:5:6.5) (2:5:6.5) (2:5:6.5) (2:5:6.5) (2:5:6.5)) (IOPATH OENeg Q0 (1:5:6) (1:5:6) (1:5:6) (0:5:6) (1:5:6) (0:5:6)) )) (TIMINGCHECK (PERIOD (posedge RCLK) (10)) (WIDTH (posedge RCLK) (4.5)) (WIDTH (negedge RCLK) (4.5)) (WIDTH (negedge RSNeg) (10)) (WIDTH (negedge RXINeg) (3)) (SETUPHOLD D0 (posedge WCLK) (3) (0)) (SETUPHOLD RENNeg (posedge RCLK) (3) (0)) (SETUPHOLD LDNeg (posedge RCLK) (3) (0)) (SETUP LDNeg (posedge RSNeg) (8)) (SETUP RXINeg (posedge RCLK) (3)) )) (CELL (CELLTYPE "VITALbuf") (INSTANCE %LABEL%/SKEW1) (DELAY (ABSOLUTE ( DEVICE (5) ) ) ) ) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/SKEW2) (DELAY (ABSOLUTE ( DEVICE (12) ) ) )</TIMING></FMFTIME><FMFTIME>IDT72845LB15PF<SOURCE>IDT data sheet February 1999</SOURCE><COMMENT>The Values listed are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><COMMENT>No value found for tLDH</COMMENT><TIMING> (DELAY (ABSOLUTE (IOPATH RSNeg EFNeg (3:10:15) (3:10:15)) (IOPATH RCLK EFNeg (2:6:10) (2:6:10)) (IOPATH RCLK PAENeg (4:12:20) (5:12:20)) (IOPATH RCLK PAFNeg (4:12:20) (5:12:20)) (IOPATH WCLK FFNeg (2:6:10) (2:6:10)) (IOPATH RCLK WXOHFNeg (4:12:20) (5:12:20)) (IOPATH RCLK RXONeg (2:6:10) (2:6:10)) (IOPATH RSNeg Q0 (3:10:15) (3:10:15) (3:10:15) (3:10:15) (3:10:15) (3:10:15)) (IOPATH RCLK Q0 (2:6:10)(2:6:10)(2:6:10)(2:6:10)(2:6:10)(2:6:10)) (IOPATH OENeg Q0 (1:6:8) (1:6:8) (1:6:8) (0:6:8) (1:6:8) (0:6:8)) )) (TIMINGCHECK (PERIOD (posedge RCLK) (15)) (WIDTH (posedge RCLK) (6)) (WIDTH (negedge RCLK) (6)) (WIDTH (negedge RSNeg) (15)) (WIDTH (negedge RXINeg) (6.5)) (SETUPHOLD D0 (posedge WCLK) (4) (1)) (SETUPHOLD RENNeg (posedge RCLK) (4) (1)) (SETUPHOLD LDNeg (posedge RCLK) (4) (1)) (SETUP LDNeg (posedge RSNeg) (10)) (SETUP RXINeg (posedge RCLK) (5)) )) (CELL (CELLTYPE "VITALbuf") (INSTANCE %LABEL%/SKEW1) (DELAY (ABSOLUTE ( DEVICE (6) ) ) ) ) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/SKEW2) (DELAY (ABSOLUTE ( DEVICE (15) ) ) )</TIMING></FMFTIME><FMFTIME>IDT72845LB25PF<SOURCE>IDT data sheet February 1999</SOURCE><COMMENT>The Values listed are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><COMMENT>No value found for tLDH</COMMENT><TIMING> (DELAY (ABSOLUTE (IOPATH RSNeg EFNeg (4:13:25) (4:13:25)) (IOPATH RCLK EFNeg (3:8:15) (3:8:15)) (IOPATH RCLK PAENeg (5:20:35) (5:20:35)) (IOPATH RCLK PAFNeg (5:20:35) (5:20:35)) (IOPATH WCLK PAFNeg (5:20:35) (5:20:35)) (IOPATH WCLK FFNeg (3:8:15) (3:8:15)) (IOPATH RCLK WXOHFNeg (5:20:35) (5:20:35)) (IOPATH RCLK RXONeg (3:8:15) (3:8:15)) (IOPATH RSNeg Q0 (4:13:25) (4:13:25) (4:13:25) (4:13:25) (4:13:25) (4:13:25)) (IOPATH RCLK Q0 (3:8:15) (3:8:15) (3:8:15) (3:8:15) (3:8:15) (3:8:15)) (IOPATH OENeg Q0 (1:9:12) (1:9:12) (1:9:12) (0:9:12) (1:9:12) (0:9:12)) )) (TIMINGCHECK (PERIOD (posedge RCLK) (25)) (WIDTH (posedge RCLK) (10)) (WIDTH (negedge RCLK) (10)) (WIDTH (negedge RSNeg) (25)) (WIDTH (negedge RXINeg) (10)) (SETUPHOLD D0 (posedge WCLK) (6) (1)) (SETUPHOLD RENNeg (posedge RCLK) (6) (1)) (SETUPHOLD LDNeg (posedge RCLK) (6) (1)) (SETUP LDNeg (posedge RSNeg) (15)) (SETUP RXINeg (posedge RCLK) (10)) )) (CELL (CELLTYPE "VITALbuf") (INSTANCE %LABEL%/SKEW1) (DELAY (ABSOLUTE ( DEVICE (10) ) ) ) ) (CELL (CELLTYPE "VITALbuf" ) (INSTANCE %LABEL%/SKEW2) (DELAY (ABSOLUTE ( DEVICE (17) ) ) )</TIMING></FMFTIME></BODY></FTML>⌨️ 快捷键说明
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