📄 fifo7881.ftm

📁 VHDL的ram和fifo model code 包含众多的厂家
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for FIFO7881 Parts</TITLE><REVISION.HISTORY>version: |  author:  | mod date: | changes made:  V1.0     R. Munden   98 JUN 09   Initial release</REVISION.HISTORY></HEAD><BODY><TIMESCALE>1ns</TIMESCALE><MODEL>FIFO7881<FMFTIME>SN74ACT7881-15FN<SOURCE>Texas Instruments SCAS227E-Revised April 1998</SOURCE>SN74ACT7881-15PN<SOURCE>Texas Instruments SCAS227E-Revised April 1998</SOURCE><COMMENT> The values listed are for VCC=4.5V to 5.5V, CL=50pF, Ta=0 to +70 Celsius</COMMENT><COMMENT> Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE     (IOPATH RCLK Q0 (3.0:6.0:12.0) (3.0:6.0:12.0))     (IOPATH WCLK IRF (2.0:4.0:8.0) (2.0:4.0:8.0))     (IOPATH RCLK ORF (2.0:4.0:8.0) (2.0:4.0:8.0))     (IOPATH RCLK AF (6.0:12.0:17.0) (6.0:12.0:17.0))     (IOPATH RCLK HF (6.0:10.0:14.0) (6.0:10.0:14.0))     (IOPATH RSNeg AF (3.0:6.0:12.0) (3.0:6.0:12.0))     (IOPATH RSNeg HF (3.0:7.0:14.0) (3.0:7.0:14.0))     (IOPATH OE Q0 () () (2.0:6.0:10.0) (2.0:6.0:9.0) (2.0:6.0:10.0) (2.0:6.0:9.0))  ))  (TIMINGCHECK    (PERIOD (posedge RCLK) (15:15:15))    (WIDTH  (posedge RCLK) (5.0:5.0:5.0))    (WIDTH  (negedge RCLK) (7.0:7.0:7.0))    (WIDTH  (posedge WCLK) (5.0:5.0:5.0))    (WIDTH  (negedge WCLK) (7.0:7.0:7.0))    (WIDTH  (posedge DAFNeg) (7.0:7.0:7.0))    (SETUP D0 WCLK (5.0:5.0:5.0))    (SETUP WEN1 WCLK (4.0:4.0:4.0))    (SETUP REN1 RCLK (4.0:4.0:4.0))    (SETUP OE RCLK (4.0:4.0:4.0))    (SETUP RSNeg RCLK (5.0:5.0:5.0))    (SETUP D0 DAFNeg (3.0:3.0:3.0))    (SETUP DAFNeg RSNeg (4.0:4.0:4.0))    (HOLD D0 WCLK (0.0:0.0:0.0))    (HOLD WEN1 WCLK (0.0:0.0:0.0))    (HOLD REN1 RCLK (0.0:0.0:0.0))    (HOLD OE RCLK (0.0:0.0:0.0))    (HOLD RSNeg RCLK (0.0:0.0:0.0))    (HOLD D0 DAFNeg (0.0:0.0:0.0))    (HOLD DAFNeg RSNeg (0.0:0.0:0.0)) )</TIMING></FMFTIME><FMFTIME>SN74ACT7881-20FN<SOURCE>Texas Instruments SCAS227E-Revised April 1998</SOURCE>SN74ACT7881-20PN<SOURCE>Texas Instruments SCAS227E-Revised April 1998</SOURCE><COMMENT> The values listed are for VCC=4.5V to 5.5V, CL=50pF, Ta=0 to +70 Celsius</COMMENT><COMMENT> Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE     (IOPATH RCLK Q0 (3.0:7.0:13.0) (3.0:7.0:13.0))     (IOPATH WCLK IRF (2.0:5.0:9.5) (2.0:5.0:9.5))     (IOPATH RCLK ORF (2.0:5.0:9.5) (2.0:5.0:9.5))     (IOPATH RCLK AF (6.0:13.0:19.0) (6.0:13.0:19.0))     (IOPATH RCLK HF (6.0:12.0:17.0) (6.0:12.0:17.0))     (IOPATH RSNeg AF (6.0:12.0:17.0) (6.0:12.0:17.0))     (IOPATH RSNeg HF (3.0:10.0:19.0) (3.0:10.0:19.0))     (IOPATH OE Q0 () () (2.0:8.0:14.0) (2.0:7.0:11.0) (2.0:8.0:14.0) (2.0:7.0:11.0))  ))  (TIMINGCHECK    (PERIOD (posedge RCLK) (20:20:20))    (WIDTH  (posedge RCLK) (7.0:7.0:7.0))    (WIDTH  (negedge RCLK) (7.0:7.0:7.0))    (WIDTH  (posedge WCLK) (7.0:7.0:7.0))    (WIDTH  (negedge WCLK) (7.0:7.0:7.0))    (WIDTH  (posedge DAFNeg) (7.0:7.0:7.0))    (SETUP D0 WCLK (5.0:5.0:5.0))    (SETUP WEN1 WCLK (5.0:5.0:5.0))    (SETUP REN1 RCLK (5.0:5.0:5.0))    (SETUP OE RCLK (5.0:5.0:5.0))    (SETUP RSNeg RCLK (6.0:6.0:6.0))    (SETUP D0 DAFNeg (5.0:5.0:5.0))    (SETUP DAFNeg RSNeg (6.0:6.0:6.0))    (HOLD D0 WCLK (0.0:0.0:0.0))    (HOLD WEN1 WCLK (0.0:0.0:0.0))    (HOLD REN1 RCLK (0.0:0.0:0.0))    (HOLD OE RCLK (0.0:0.0:0.0))    (HOLD RSNeg RCLK (0.0:0.0:0.0))    (HOLD D0 DAFNeg (0.0:0.0:0.0))    (HOLD DAFNeg RSNeg (0.0:0.0:0.0)) )</TIMING></FMFTIME><FMFTIME>SN74ACT7881-30FN<SOURCE>Texas Instruments SCAS227E-Revised April 1998</SOURCE>SN74ACT7881-30PN<SOURCE>Texas Instruments SCAS227E-Revised April 1998</SOURCE><COMMENT> The values listed are for VCC=4.5V to 5.5V, CL=50pF, Ta=0 to +70 Celsius</COMMENT><COMMENT> Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE     (IOPATH RCLK Q0 (3.0:12.0:18.0) (3.0:12.0:18.0))     (IOPATH WCLK IRF (2.0:8.0:12.0) (2.0:8.0:12.0))     (IOPATH RCLK ORF (2.0:8.0:12.0) (2.0:8.0:12.0))     (IOPATH RCLK AF (6.0:17.0:22.0) (6.0:17.0:22.0))     (IOPATH RCLK HF (6.0:16.0:21.0) (6.0:16.0:21.0))     (IOPATH RSNeg AF (3.0:14.0:21.0) (3.0:14.0:21.0))     (IOPATH RSNeg HF (3.0:15.0:23.0) (3.0:15.0:23.0))     (IOPATH OE Q0 () () (2.0:8.0:14.0) (2.0:7.0:11.0) (2.0:8.0:14.0) (2.0:7.0:11.0))  ))  (TIMINGCHECK    (PERIOD (posedge RCLK) (30:30:30))    (WIDTH  (posedge RCLK) (8.5:8.5:8.5))    (WIDTH  (negedge RCLK) (11.0:11.0:11.0))    (WIDTH  (posedge WCLK) (8.5:8.5:8.5))    (WIDTH  (negedge WCLK) (11.0:11.0:11.0))    (WIDTH  (posedge DAFNeg) (10.0:10.0:10.0))    (SETUP D0 WCLK (5.0:5.0:5.0))    (SETUP WEN1 WCLK (5.0:5.0:5.0))    (SETUP REN1 RCLK (5.0:5.0:5.0))    (SETUP OE RCLK (5.0:5.0:5.0))    (SETUP RSNeg RCLK (7.0:7.0:7.0))    (SETUP D0 DAFNeg (5.0:5.0:5.0))    (SETUP DAFNeg RSNeg (7.0:7.0:7.0))    (HOLD D0 WCLK (0.0:0.0:0.0))    (HOLD WEN1 WCLK (0.0:0.0:0.0))    (HOLD REN1 RCLK (0.0:0.0:0.0))    (HOLD OE RCLK (0.0:0.0:0.0))    (HOLD RSNeg RCLK (0.0:0.0:0.0))    (HOLD D0 DAFNeg (0.0:0.0:0.0))    (HOLD DAFNeg RSNeg (0.0:0.0:0.0)) )</TIMING></FMFTIME></BODY></FTML>
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