📄 idt72105.vhd
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); SIGNAL SO_zd : std_logic := 'Z'; SIGNAL EF_pulse : std_ulogic := '0'; SIGNAL FF_pulse : std_ulogic := '0'; BEGIN ---------------------------------------------------------------------------- -- Main Behavior Process ---------------------------------------------------------------------------- VITALBehaviour : PROCESS (DataIn, SOCPIn, WNegIn, RSIXIn, FLNegIn, RSNegIn, FF_pulse, EF_pulse,SO_zd) -- Timing Check Variables VARIABLE Tviol_D0_WNeg : X01 := '0'; VARIABLE TD_D0_WNeg : VitalTimingDataType; VARIABLE Tviol_RSIX_SOCP : X01 := '0'; VARIABLE TD_RSIX_SOCP : VitalTimingDataType; VARIABLE Tviol_FLNeg_RSNeg : X01 := '0'; VARIABLE TD_FLNeg_RSNeg : VitalTimingDataType; VARIABLE Tviol_FLNeg_SOCP : X01 := '0'; VARIABLE TD_FLNeg_SOCP : VitalTimingDataType; VARIABLE Pviol_WNeg : X01 := '0'; VARIABLE PD_WNeg : VitalPeriodDataType := VitalPeriodDataInit; VARIABLE Pviol_SOCP : X01 := '0'; VARIABLE PD_SOCP : VitalPeriodDataType := VitalPeriodDataInit; VARIABLE Pviol_RSNeg : X01 := '0'; VARIABLE PD_RSNeg : VitalPeriodDataType := VitalPeriodDataInit; VARIABLE Pviol_RSIX : X01 := '0'; VARIABLE PD_RSIX : VitalPeriodDataType := VitalPeriodDataInit; -- Memory array declaration TYPE MemStore IS ARRAY (0 to TotalLOC) OF INTEGER RANGE -2 TO MaxData; -- Functionality Results Variables VARIABLE Violation : X01 := '0'; TYPE mode_type IS (unk, single, first_exp, other_exp); TYPE stat_type IS (inact, act); VARIABLE mode : mode_type; VARIABLE rd_stat : stat_type; VARIABLE wr_stat : stat_type; VARIABLE FFNeg_zd : std_ulogic; VARIABLE EFNeg_zd : std_ulogic; VARIABLE HFNeg_zd : std_ulogic; VARIABLE RSOX_zd : std_ulogic; VARIABLE EF_pzd : std_ulogic; VARIABLE FF_pzd : std_ulogic; VARIABLE reset_done : boolean := false; VARIABLE wr_inhibit : boolean := false; VARIABLE RDPoint : NATURAL RANGE 0 TO TotalLoc := 0; VARIABLE WRPoint : NATURAL RANGE 0 TO TotalLoc := 0; VARIABLE Count : NATURAL RANGE 0 TO TotalLoc := 0; VARIABLE BitPoint : NATURAL RANGE 0 TO HiDbit := 0; VARIABLE MemData : MemStore; Variable DataDriveOut : std_logic :='Z'; VARIABLE DataDrive : std_logic_vector(HiDbit DOWNTO 0) := (OTHERS => 'Z'); -- Output Glitch Detection Variables VARIABLE FF_GlitchData : VitalGlitchDataType; VARIABLE EF_GlitchData : VitalGlitchDataType; VARIABLE HF_GlitchData : VitalGlitchDataType; VARIABLE RSOX_GlitchData : VitalGlitchDataType; VARIABLE EFp_GlitchData : VitalGlitchDataType; VARIABLE FFp_GlitchData : VitalGlitchDataType; VARIABLE SO_GlitchData : VitalGlitchDataType; BEGIN ---------------------------------------------------------------------------- -- Timing Check Section ---------------------------------------------------------------------------- IF (TimingChecksOn) THEN VitalSetupHoldCheck ( TestSignal => DataIn, TestSignalName => "D", RefSignal => WNegIn, RefSignalName => "WNeg", SetupHigh => tsetup_D0_WNeg, SetupLow => tsetup_D0_WNeg, HoldHigh => thold_D0_WNeg, HoldLow => thold_D0_WNeg, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & PartID, TimingData => TD_D0_WNeg, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D0_WNeg ); VitalSetupHoldCheck ( TestSignal => RSIXIn, TestSignalName => "RSIX", RefSignal => SOCPIn, RefSignalName => "SOCP", SetupHigh => tsetup_RSIX_SOCP, SetupLow => tsetup_RSIX_SOCP, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & PartID, TimingData => TD_RSIX_SOCP, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_RSIX_SOCP ); VitalSetupHoldCheck ( TestSignal => FLNegIn, TestSignalName => "FLNeg", RefSignal => RSNegIn, RefSignalName => "RSNeg", SetupLow => tsetup_FLNeg_RSNeg, HoldLow => thold_FLNeg_RSNeg, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & PartID, TimingData => TD_FLNeg_RSNeg, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_FLNeg_RSNeg ); VitalSetupHoldCheck ( TestSignal => FLNegIn, TestSignalName => "FLNeg", RefSignal => SOCPIn, RefSignalName => "RSNeg", SetupLow => tsetup_FLNeg_SOCP, HoldLow => thold_FLNeg_SOCP, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & PartID, TimingData => TD_FLNeg_SOCP, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_FLNeg_SOCP ); VitalSetupHoldCheck ( TestSignal => RSIXIn, TestSignalName => "RSIX", RefSignal => SOCPIn, RefSignalName => "SOCP", SetupHigh => tsetup_RSIX_SOCP, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & PartID, TimingData => TD_RSIX_SOCP, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_RSIX_SOCP ); VitalPeriodPulseCheck ( TestSignal => WNegIn, TestSignalName => "WNeg", Period => tperiod_WNeg_negedge, PulseWidthHigh => tpw_WNeg_posedge, PulseWidthLow => tpw_WNeg_negedge, HeaderMsg => InstancePath & PartID, CheckEnabled => TRUE, PeriodData => PD_WNeg, XOn => XOn, MsgOn => MsgOn, Violation => Pviol_WNeg ); VitalPeriodPulseCheck ( TestSignal => SOCPIn, TestSignalName => "SOCP", Period => tperiod_SOCP_posedge, PulseWidthHigh => tpw_SOCP_posedge, PulseWidthLow => tpw_SOCP_negedge, HeaderMsg => InstancePath & PartID, CheckEnabled => TRUE, PeriodData => PD_SOCP, XOn => XOn, MsgOn => MsgOn, Violation => Pviol_SOCP ); VitalPeriodPulseCheck ( TestSignal => RSNegIn, TestSignalName => "RSNeg", PulseWidthLow => tpw_RSNeg_negedge, HeaderMsg => InstancePath & PartID, CheckEnabled => TRUE, PeriodData => PD_RSNeg, XOn => XOn, MsgOn => MsgOn, Violation => Pviol_RSNeg ); VitalPeriodPulseCheck ( TestSignal => RSIXIn, TestSignalName => "RSIX", PulseWidthLow => tpw_RSIX_posedge, HeaderMsg => InstancePath & PartID, CheckEnabled => TRUE, PeriodData => PD_RSIX, XOn => XOn, MsgOn => MsgOn, Violation => Pviol_RSIX ); END IF; ---------------------------------------------------------------------------- -- Functionality Section ---------------------------------------------------------------------------- Violation := Tviol_D0_WNeg OR Tviol_RSIX_SOCP OR Tviol_FLNeg_SOCP OR Tviol_FLNeg_RSNeg OR Tviol_RSIX_SOCP OR Pviol_WNeg OR Pviol_SOCP OR Pviol_RSNeg OR Pviol_RSIX ; IF (Violation = 'X') THEN DataDrive := (OTHERS => 'X'); FFNeg_zd := 'X'; EFNeg_zd := 'X'; HFNeg_zd := 'X'; RSOX_zd := 'X'; -- reset ELSIF falling_edge(RSNegIn) THEN FFNeg_zd := '1'; EFNeg_zd := '0'; RSOX_zd := '0'; HFNeg_zd := '1'; SO_zd <= '0'; RDPoint := 0 ; WRPoint := 0 ; Count := 0 ; wr_inhibit := FALSE; ELSIF rising_edge(RSNegIn) THEN reset_done := true; IF RSIXIn = '1' THEN mode := single; rd_stat := act; wr_stat := act; ELSIF FLNegIn = '0' THEN mode := first_exp; rd_stat := act; wr_stat := act; ELSE mode := other_exp; rd_stat := inact; wr_stat := inact; END IF; END IF; -- Parallel in IF falling_edge(WNegIn) THEN IF wr_stat = act AND not wr_inhibit THEN IF Violation = '0' THEN MemData(WRPoint) := to_nat(DataIn); ELSE MemData(WRPoint) := -1; END IF; IF WRPoint < TotalLoc THEN WRPoint := WRPoint + 1; ELSE WRPoint := 0; END IF; Count := Count + 1; EFNeg_zd := '1'; IF Count < Ael THEN FFNeg_zd := '1'; HFNeg_zd := '1'; IF mode = single THEN RSOX_zd := '0';
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