📄 idt723623.ftm

📁 VHDL的ram和fifo model code 包含众多的厂家
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<!DOCTYPE FTML SYSTEM "ftml.dtd"><FTML><HEAD><TITLE>FMF Timing for IDT723623 Parts</TITLE><REVISION.HISTORY>version: |  author:  | mod date: | changes made:  V1.0     R. Munden   99 FEB 11   Initial release</REVISION.HISTORY></HEAD><BODY><TIMESCALE>1ns</TIMESCALE><MODEL>IDT723623<FMFTIME>IDT723623L15PF<SOURCE>IDT data sheet May 1998</SOURCE><COMMENT>The Values listed are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE     (IOPATH CLKA A0 (3:6:10) (3:6:10))     (IOPATH CLKA FFIR (2:6:8) (2:6:8))     (IOPATH CLKB EFOR (1:5:8) (1:5:8))     (IOPATH CLKB AENeg (1:5:8) (1:5:8))     (IOPATH CLKA AFNeg (1:5:8) (1:5:8))     (IOPATH CLKA MBF1Neg (0:5:8) (0:5:8))     (IOPATH CLKA B0 (3:7:12) (3:7:12))     (IOPATH MBA A0 (3:6:10) (3:6:10))     (IOPATH MRSNeg AENeg (1:8:15) (1:8:15))     (IOPATH CSANeg A0 () () (1:5:8) (2:6:10) (1:5:8) (2:6:10))    ))   (TIMINGCHECK     (PERIOD (posedge CLKA) (15:15:15))     (WIDTH (posedge CLKA) (6:6:6))     (WIDTH (negedge CLKA) (6:6:6))     (SETUP A0 CLKA (4:4:4))     (SETUP CSANeg CLKA (4.5))     (SETUP MRSNeg CLKA (4.5))     (SETUP FS0SD MRSNeg (7.5))     (SETUP BEFWFT MRSNeg (7.5))     (SETUP SPMNeg MRSNeg (7.5))     (SETUP FS0SD CLKA (4:4:4))     (SETUP FS1SEN CLKA (4:4:4))     (SETUP BEFWFT CLKA (0:0:0))     (HOLD A0 CLKA (1:1:1))     (HOLD CSANeg CLKA (1:1:1))     (HOLD MRSNeg CLKA (4:4:4))     (HOLD FS0SD MRSNeg (2:2:2))     (HOLD BEFWFT MRSNeg (2:2:2))     (HOLD SPMNeg MRSNeg (2:2:2))     (HOLD FS0SD CLKA (1:1:1))     (HOLD FS1SEN CLKA (1:1:1))     (HOLD FS1SEN MRSNeg (2:2:2))  ))  (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/SKEW1) (DELAY  (ABSOLUTE ( DEVICE  (7.5) ) ) ) ) (CELL (CELLTYPE "VITALbuf" )     (INSTANCE %LABEL%/SKEW2) (DELAY  (ABSOLUTE ( DEVICE  (12) ) ) ) </TIMING></FMFTIME><FMFTIME>IDT723623L20PF<SOURCE>IDT data sheet May 1998</SOURCE><COMMENT>The Values listed are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE     (IOPATH CLKA A0 (3:8:12) (3:8:12))     (IOPATH CLKA FFIR (2:6:10) (2:6:10))     (IOPATH CLKB EFOR (1:5:10) (1:5:10))     (IOPATH CLKB AENeg (1:5:10) (1:5:10))     (IOPATH CLKA AFNeg (1:5:10) (1:5:10))     (IOPATH CLKA MBF1Neg (0:5:10) (0:5:10))     (IOPATH CLKA B0 (3:9:14) (3:9:14))     (IOPATH MBA A0 (3:8:12) (3:8:12))     (IOPATH MRSNeg AENeg (1:11:20) (1:11:20))     (IOPATH CSANeg A0 () () (1:5:10) (2:6:12) (1:5:10) (2:6:10))    ))   (TIMINGCHECK     (PERIOD (posedge CLKA) (20:20:20))     (WIDTH (posedge CLKA) (8:8:8))     (WIDTH (negedge CLKA) (8:8:8))     (SETUP A0 CLKA (5:5:5))     (SETUP CSANeg CLKA (5:5:5))     (SETUP MRSNeg CLKA (6:6:6))     (SETUP FS0SD MRSNeg (8.5))     (SETUP BEFWFT MRSNeg (8.5))     (SETUP SPMNeg MRSNeg (8.5))     (SETUP FS0SD CLKA (5:5:5))     (SETUP FS1SEN CLKA (5:5:5))     (SETUP BEFWFT CLKA (0:0:0))     (HOLD A0 CLKA (1:1:1))     (HOLD CSANeg CLKA (1:1:1))     (HOLD MRSNeg CLKA (4:4:4))     (HOLD FS0SD MRSNeg (3:3:3))     (HOLD BEFWFT MRSNeg (3:3:3))     (HOLD SPMNeg MRSNeg (3:3:3))     (HOLD FS0SD CLKA (1:1:1))     (HOLD FS1SEN CLKA (1:1:1))     (HOLD FS1SEN MRSNeg (3:3:3))  ))  (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/SKEW1) (DELAY  (ABSOLUTE ( DEVICE  (9) ) ) ) ) (CELL (CELLTYPE "VITALbuf" )     (INSTANCE %LABEL%/SKEW2) (DELAY  (ABSOLUTE ( DEVICE  (16) ) ) ) )</TIMING></FMFTIME><FMFTIME>IDT723623L30PF<SOURCE>IDT data sheet May 1998</SOURCE><COMMENT>The Values listed are for VCC=4.5V to 5.5V, CL=30pF, Ta=0 to 70 Celsius</COMMENT><COMMENT>Typical values are derived</COMMENT><TIMING>  (DELAY (ABSOLUTE     (IOPATH CLKA A0 (3:9:15) (3:9:15))     (IOPATH CLKA FFIR (2:6:12) (2:6:12))     (IOPATH CLKB EFOR (1:5:12) (1:5:12))     (IOPATH CLKB AENeg (1:5:12) (1:5:12))     (IOPATH CLKA AFNeg (1:5:12) (1:5:12))     (IOPATH CLKA MBF1Neg (0:5:12) (0:5:12))     (IOPATH CLKA B0 (3:9:15) (3:9:15))     (IOPATH MBA A0 (3:9:15) (3:9:15))     (IOPATH MRSNeg AENeg (1:16:30) (1:16:30))     (IOPATH CSANeg A0 () () (1:5:11) (2:8:14) (1:5:11) (2:8:14))    ))   (TIMINGCHECK     (PERIOD (posedge CLKA) (30:30:30))     (WIDTH (posedge CLKA) (10:10:10))     (WIDTH (negedge CLKA) (10:1:10))     (SETUP A0 CLKA (6:6:6))     (SETUP CSANeg CLKA (6:6:6))     (SETUP MRSNeg CLKA (7:7:7))     (SETUP FS0SD MRSNeg (9.5))     (SETUP BEFWFT MRSNeg (9.5))     (SETUP SPMNeg MRSNeg (9.5))     (SETUP FS0SD CLKA (6:6:6))     (SETUP FS1SEN CLKA (6:6:6))     (SETUP BEFWFT CLKA (0:0:0))     (HOLD A0 CLKA (1:1:1))     (HOLD CSANeg CLKA (1:1:1))     (HOLD MRSNeg CLKA (5:5:5))     (HOLD FS0SD MRSNeg (3:3:3))     (HOLD BEFWFT MRSNeg (3:3:3))     (HOLD SPMNeg MRSNeg (3:3:3))     (HOLD FS0SD CLKA (1:1:1))     (HOLD FS1SEN CLKA (1:1:1))     (HOLD FS1SEN MRSNeg (3:3:3))  ))  (CELL (CELLTYPE "VITALbuf")     (INSTANCE %LABEL%/SKEW1) (DELAY  (ABSOLUTE ( DEVICE  (11) ) ) ) ) (CELL (CELLTYPE "VITALbuf" )     (INSTANCE %LABEL%/SKEW2) (DELAY  (ABSOLUTE ( DEVICE  (20) ) ) ) </TIMING></FMFTIME></BODY></FTML>
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