📄 sy69167.vhd
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ALIAS Q6_zd : std_logic IS DataDrive(6); ALIAS Q7_zd : std_logic IS DataDrive(7); ALIAS Q8_zd : std_logic IS DataDrive(8); ALIAS Q9_zd : std_logic IS DataDrive(9); ALIAS Q10_zd : std_logic IS DataDrive(10); ALIAS Q11_zd : std_logic IS DataDrive(11); ALIAS Q12_zd : std_logic IS DataDrive(12); ALIAS Q13_zd : std_logic IS DataDrive(13); ALIAS Q14_zd : std_logic IS DataDrive(14); ALIAS Q15_zd : std_logic IS DataDrive(15); ALIAS Q16_zd : std_logic IS DataDrive(16); ALIAS Q17_zd : std_logic IS DataDrive(17); -- Timing Check Variables VARIABLE Tviol_D0_CLK : X01 := '0'; VARIABLE TD_D0_CLK : VitalTimingDataType; VARIABLE Tviol_D1_CLK : X01 := '0'; VARIABLE TD_D1_CLK : VitalTimingDataType; VARIABLE Tviol_D2_CLK : X01 := '0'; VARIABLE TD_D2_CLK : VitalTimingDataType; VARIABLE Tviol_D3_CLK : X01 := '0'; VARIABLE TD_D3_CLK : VitalTimingDataType; VARIABLE Tviol_D4_CLK : X01 := '0'; VARIABLE TD_D4_CLK : VitalTimingDataType; VARIABLE Tviol_D5_CLK : X01 := '0'; VARIABLE TD_D5_CLK : VitalTimingDataType; VARIABLE Tviol_D6_CLK : X01 := '0'; VARIABLE TD_D6_CLK : VitalTimingDataType; VARIABLE Tviol_D7_CLK : X01 := '0'; VARIABLE TD_D7_CLK : VitalTimingDataType; VARIABLE Tviol_D8_CLK : X01 := '0'; VARIABLE TD_D8_CLK : VitalTimingDataType; VARIABLE Tviol_D9_CLK : X01 := '0'; VARIABLE TD_D9_CLK : VitalTimingDataType; VARIABLE Tviol_D10_CLK : X01 := '0'; VARIABLE TD_D10_CLK : VitalTimingDataType; VARIABLE Tviol_D11_CLK : X01 := '0'; VARIABLE TD_D11_CLK : VitalTimingDataType; VARIABLE Tviol_D12_CLK : X01 := '0'; VARIABLE TD_D12_CLK : VitalTimingDataType; VARIABLE Tviol_D13_CLK : X01 := '0'; VARIABLE TD_D13_CLK : VitalTimingDataType; VARIABLE Tviol_D14_CLK : X01 := '0'; VARIABLE TD_D14_CLK : VitalTimingDataType; VARIABLE Tviol_D15_CLK : X01 := '0'; VARIABLE TD_D15_CLK : VitalTimingDataType; VARIABLE Tviol_D16_CLK : X01 := '0'; VARIABLE TD_D16_CLK : VitalTimingDataType; VARIABLE Tviol_D17_CLK : X01 := '0'; VARIABLE TD_D17_CLK : VitalTimingDataType; VARIABLE Tviol_WRNeg_CLK: X01 := '0'; VARIABLE TD_WRNeg_CLK : VitalTimingDataType; VARIABLE Tviol_RDNeg_CLK: X01 := '0'; VARIABLE TD_RDNeg_CLK : VitalTimingDataType; VARIABLE PD_CLK : VitalPeriodDataType := VitalPeriodDataInit; VARIABLE Pviol_CLK : X01 := '0'; VARIABLE PD_WRNeg : VitalPeriodDataType := VitalPeriodDataInit; VARIABLE Pviol_WRNeg : X01 := '0'; VARIABLE Violation : X01 := '0'; -- Output Glitch Detection Variables VARIABLE Q0_GlitchData : VitalGlitchDataType; VARIABLE Q1_GlitchData : VitalGlitchDataType; VARIABLE Q2_GlitchData : VitalGlitchDataType; VARIABLE Q3_GlitchData : VitalGlitchDataType; VARIABLE Q4_GlitchData : VitalGlitchDataType; VARIABLE Q5_GlitchData : VitalGlitchDataType; VARIABLE Q6_GlitchData : VitalGlitchDataType; VARIABLE Q7_GlitchData : VitalGlitchDataType; VARIABLE Q8_GlitchData : VitalGlitchDataType; VARIABLE Q9_GlitchData : VitalGlitchDataType; VARIABLE Q10_GlitchData : VitalGlitchDataType; VARIABLE Q11_GlitchData : VitalGlitchDataType; VARIABLE Q12_GlitchData : VitalGlitchDataType; VARIABLE Q13_GlitchData : VitalGlitchDataType; VARIABLE Q14_GlitchData : VitalGlitchDataType; VARIABLE Q15_GlitchData : VitalGlitchDataType; VARIABLE Q16_GlitchData : VitalGlitchDataType; VARIABLE Q17_GlitchData : VitalGlitchDataType; VARIABLE FULL_GlitchData : VitalGlitchDataType; VARIABLE HALF_GlitchData : VitalGlitchDataType; VARIABLE EMPTY_GlitchData : VitalGlitchDataType; VARIABLE OVFLOW_GlitchData : VitalGlitchDataType; VARIABLE UNFLOW_GlitchData : VitalGlitchDataType; -- No Weak Values Variables VARIABLE RDNeg_nwv : UX01 := 'X'; VARIABLE WRNeg_nwv : UX01 := 'X'; VARIABLE RSTNeg_nwv : UX01 := 'X'; VARIABLE INHIBIT_nwv : UX01 := 'X'; BEGIN RDNeg_nwv := To_UX01 (s => RDNeg_ipd); WRNeg_nwv := To_UX01 (s => WRNeg_ipd); RSTNeg_nwv := To_UX01 (s => RSTNeg_ipd); INHIBIT_nwv := To_UX01 (s => INHIBIT_ipd); ------------------------------------------------------------------------ -- Timing Check Section ------------------------------------------------------------------------ IF (TimingChecksOn) THEN VitalSetupHoldCheck ( TestSignal => D0_ipd, TestSignalName => "D0_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D0_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D0_CLK ); VitalSetupHoldCheck ( TestSignal => D1_ipd, TestSignalName => "D1_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D1_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D1_CLK ); VitalSetupHoldCheck ( TestSignal => D2_ipd, TestSignalName => "D2_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D2_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D2_CLK ); VitalSetupHoldCheck ( TestSignal => D3_ipd, TestSignalName => "D3_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D3_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D3_CLK ); VitalSetupHoldCheck ( TestSignal => D4_ipd, TestSignalName => "D4_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D4_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D4_CLK ); VitalSetupHoldCheck ( TestSignal => D5_ipd, TestSignalName => "D5_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D5_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D5_CLK ); VitalSetupHoldCheck ( TestSignal => D6_ipd, TestSignalName => "D6_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D6_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D6_CLK ); VitalSetupHoldCheck ( TestSignal => D7_ipd, TestSignalName => "D7_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D7_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D7_CLK ); VitalSetupHoldCheck ( TestSignal => D8_ipd, TestSignalName => "D8_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D8_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D8_CLK ); VitalSetupHoldCheck ( TestSignal => D9_ipd, TestSignalName => "D9_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D9_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D9_CLK ); VitalSetupHoldCheck ( TestSignal => D10_ipd, TestSignalName => "D10_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/', HeaderMsg => InstancePath & "/sy69167", TimingData => TD_D10_CLK, XOn => XOn, MsgOn => MsgOn, Violation => Tviol_D10_CLK ); VitalSetupHoldCheck ( TestSignal => D11_ipd, TestSignalName => "D11_ipd", RefSignal => CLK_ipd, RefSignalName => "CLK_ipd", SetupHigh => tsetup_D0_CLK, SetupLow => tsetup_D0_CLK, HoldHigh => thold_D0_CLK, HoldLow => thold_D0_CLK, CheckEnabled => TRUE, RefTransition => '/',
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