wr_fifo.tan.qmsg

S11_USB ,maxII 的FPGA芯片

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "1 " "Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "u_ifclk~reg0 " "Info: Detected ripple clock \"u_ifclk~reg0\" as buffer" {  } { { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 110 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "u_ifclk~reg0" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "clk register register STATE.WRITE u_slwr~reg0 275.03 MHz Internal " "Info: Clock \"clk\" Internal fmax is restricted to 275.03 MHz between source register \"STATE.WRITE\" and destination register \"u_slwr~reg0\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "1.818 ns 1.818 ns 3.636 ns " "Info: fmax restricted to Clock High delay (1.818 ns) plus Clock Low delay (1.818 ns) : restricted to 3.636 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.081 ns + Longest register register " "Info: + Longest register to register delay is 3.081 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns STATE.WRITE 1 REG LC_X4_Y1_N8 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X4_Y1_N8; Fanout = 2; REG Node = 'STATE.WRITE'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { STATE.WRITE } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.520 ns) + CELL(0.442 ns) 0.962 ns u_slwr~23 2 COMB LC_X4_Y1_N9 17 " "Info: 2: + IC(0.520 ns) + CELL(0.442 ns) = 0.962 ns; Loc. = LC_X4_Y1_N9; Fanout = 17; COMB Node = 'u_slwr~23'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "0.962 ns" { STATE.WRITE u_slwr~23 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 34 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.252 ns) + CELL(0.867 ns) 3.081 ns u_slwr~reg0 3 REG LC_X4_Y2_N1 1 " "Info: 3: + IC(1.252 ns) + CELL(0.867 ns) = 3.081 ns; Loc. = LC_X4_Y2_N1; Fanout = 1; REG Node = 'u_slwr~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "2.119 ns" { u_slwr~23 u_slwr~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.309 ns 42.49 % " "Info: Total cell delay = 1.309 ns ( 42.49 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.772 ns 57.51 % " "Info: Total interconnect delay = 1.772 ns ( 57.51 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "3.081 ns" { STATE.WRITE u_slwr~23 u_slwr~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.081 ns" { STATE.WRITE u_slwr~23 u_slwr~reg0 } { 0.000ns 0.520ns 1.252ns } { 0.000ns 0.442ns 0.867ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 9.204 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 9.204 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 1; CLK Node = 'clk'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { clk } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 26 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.587 ns) + CELL(0.935 ns) 3.991 ns u_ifclk~reg0 2 REG LC_X19_Y10_N2 20 " "Info: 2: + IC(1.587 ns) + CELL(0.935 ns) = 3.991 ns; Loc. = LC_X19_Y10_N2; Fanout = 20; REG Node = 'u_ifclk~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "2.522 ns" { clk u_ifclk~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 110 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.502 ns) + CELL(0.711 ns) 9.204 ns u_slwr~reg0 3 REG LC_X4_Y2_N1 1 " "Info: 3: + IC(4.502 ns) + CELL(0.711 ns) = 9.204 ns; Loc. = LC_X4_Y2_N1; Fanout = 1; REG Node = 'u_slwr~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "5.213 ns" { u_ifclk~reg0 u_slwr~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 33.84 % " "Info: Total cell delay = 3.115 ns ( 33.84 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.089 ns 66.16 % " "Info: Total interconnect delay = 6.089 ns ( 66.16 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 u_slwr~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 u_slwr~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 9.204 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 9.204 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 1; CLK Node = 'clk'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { clk } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 26 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.587 ns) + CELL(0.935 ns) 3.991 ns u_ifclk~reg0 2 REG LC_X19_Y10_N2 20 " "Info: 2: + IC(1.587 ns) + CELL(0.935 ns) = 3.991 ns; Loc. = LC_X19_Y10_N2; Fanout = 20; REG Node = 'u_ifclk~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "2.522 ns" { clk u_ifclk~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 110 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.502 ns) + CELL(0.711 ns) 9.204 ns STATE.WRITE 3 REG LC_X4_Y1_N8 2 " "Info: 3: + IC(4.502 ns) + CELL(0.711 ns) = 9.204 ns; Loc. = LC_X4_Y1_N8; Fanout = 2; REG Node = 'STATE.WRITE'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "5.213 ns" { u_ifclk~reg0 STATE.WRITE } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 33.84 % " "Info: Total cell delay = 3.115 ns ( 33.84 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.089 ns 66.16 % " "Info: Total interconnect delay = 6.089 ns ( 66.16 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 STATE.WRITE } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 STATE.WRITE } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 u_slwr~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 u_slwr~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 STATE.WRITE } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 STATE.WRITE } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } {  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "3.081 ns" { STATE.WRITE u_slwr~23 u_slwr~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.081 ns" { STATE.WRITE u_slwr~23 u_slwr~reg0 } { 0.000ns 0.520ns 1.252ns } { 0.000ns 0.442ns 0.867ns } } } { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 u_slwr~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 u_slwr~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 STATE.WRITE } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 STATE.WRITE } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { u_slwr~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { u_slwr~reg0 } {  } {  } } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "data_out\[0\]~reg0 rst clk 0.196 ns register " "Info: tsu for register \"data_out\[0\]~reg0\" (data pin = \"rst\", clock pin = \"clk\") is 0.196 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.363 ns + Longest pin register " "Info: + Longest pin to register delay is 9.363 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns rst 1 PIN PIN_46 19 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_46; Fanout = 19; PIN Node = 'rst'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { rst } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 25 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.483 ns) + CELL(0.292 ns) 7.244 ns u_slwr~23 2 COMB LC_X4_Y1_N9 17 " "Info: 2: + IC(5.483 ns) + CELL(0.292 ns) = 7.244 ns; Loc. = LC_X4_Y1_N9; Fanout = 17; COMB Node = 'u_slwr~23'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "5.775 ns" { rst u_slwr~23 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 34 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.252 ns) + CELL(0.867 ns) 9.363 ns data_out\[0\]~reg0 3 REG LC_X4_Y2_N2 4 " "Info: 3: + IC(1.252 ns) + CELL(0.867 ns) = 9.363 ns; Loc. = LC_X4_Y2_N2; Fanout = 4; REG Node = 'data_out\[0\]~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "2.119 ns" { u_slwr~23 data_out[0]~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.628 ns 28.07 % " "Info: Total cell delay = 2.628 ns ( 28.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.735 ns 71.93 % " "Info: Total interconnect delay = 6.735 ns ( 71.93 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.363 ns" { rst u_slwr~23 data_out[0]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.363 ns" { rst rst~out0 u_slwr~23 data_out[0]~reg0 } { 0.000ns 0.000ns 5.483ns 1.252ns } { 0.000ns 1.469ns 0.292ns 0.867ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 9.204 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 9.204 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 1; CLK Node = 'clk'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { clk } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 26 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.587 ns) + CELL(0.935 ns) 3.991 ns u_ifclk~reg0 2 REG LC_X19_Y10_N2 20 " "Info: 2: + IC(1.587 ns) + CELL(0.935 ns) = 3.991 ns; Loc. = LC_X19_Y10_N2; Fanout = 20; REG Node = 'u_ifclk~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "2.522 ns" { clk u_ifclk~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 110 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.502 ns) + CELL(0.711 ns) 9.204 ns data_out\[0\]~reg0 3 REG LC_X4_Y2_N2 4 " "Info: 3: + IC(4.502 ns) + CELL(0.711 ns) = 9.204 ns; Loc. = LC_X4_Y2_N2; Fanout = 4; REG Node = 'data_out\[0\]~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "5.213 ns" { u_ifclk~reg0 data_out[0]~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 33.84 % " "Info: Total cell delay = 3.115 ns ( 33.84 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.089 ns 66.16 % " "Info: Total interconnect delay = 6.089 ns ( 66.16 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 data_out[0]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 data_out[0]~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.363 ns" { rst u_slwr~23 data_out[0]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.363 ns" { rst rst~out0 u_slwr~23 data_out[0]~reg0 } { 0.000ns 0.000ns 5.483ns 1.252ns } { 0.000ns 1.469ns 0.292ns 0.867ns } } } { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 data_out[0]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 data_out[0]~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk data_out\[15\] data_out\[15\]~reg0 13.468 ns register " "Info: tco from clock \"clk\" to destination pin \"data_out\[15\]\" through register \"data_out\[15\]~reg0\" is 13.468 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 9.204 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 9.204 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 1; CLK Node = 'clk'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { clk } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 26 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.587 ns) + CELL(0.935 ns) 3.991 ns u_ifclk~reg0 2 REG LC_X19_Y10_N2 20 " "Info: 2: + IC(1.587 ns) + CELL(0.935 ns) = 3.991 ns; Loc. = LC_X19_Y10_N2; Fanout = 20; REG Node = 'u_ifclk~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "2.522 ns" { clk u_ifclk~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 110 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.502 ns) + CELL(0.711 ns) 9.204 ns data_out\[15\]~reg0 3 REG LC_X4_Y1_N7 2 " "Info: 3: + IC(4.502 ns) + CELL(0.711 ns) = 9.204 ns; Loc. = LC_X4_Y1_N7; Fanout = 2; REG Node = 'data_out\[15\]~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "5.213 ns" { u_ifclk~reg0 data_out[15]~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 33.84 % " "Info: Total cell delay = 3.115 ns ( 33.84 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.089 ns 66.16 % " "Info: Total interconnect delay = 6.089 ns ( 66.16 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 data_out[15]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 data_out[15]~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.040 ns + Longest register pin " "Info: + Longest register to pin delay is 4.040 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns data_out\[15\]~reg0 1 REG LC_X4_Y1_N7 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X4_Y1_N7; Fanout = 2; REG Node = 'data_out\[15\]~reg0'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "" { data_out[15]~reg0 } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 97 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.932 ns) + CELL(2.108 ns) 4.040 ns data_out\[15\] 2 PIN PIN_77 0 " "Info: 2: + IC(1.932 ns) + CELL(2.108 ns) = 4.040 ns; Loc. = PIN_77; Fanout = 0; PIN Node = 'data_out\[15\]'" {  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "4.040 ns" { data_out[15]~reg0 data_out[15] } "NODE_NAME" } "" } } { "wr_fifo.v" "" { Text "E:/68013_code/дFIFO/дFIFO/wr_fifo/wr_fifo.v" 43 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.108 ns 52.18 % " "Info: Total cell delay = 2.108 ns ( 52.18 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.932 ns 47.82 % " "Info: Total interconnect delay = 1.932 ns ( 47.82 % )" {  } {  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "4.040 ns" { data_out[15]~reg0 data_out[15] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.040 ns" { data_out[15]~reg0 data_out[15] } { 0.000ns 1.932ns } { 0.000ns 2.108ns } } }  } 0}  } { { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "9.204 ns" { clk u_ifclk~reg0 data_out[15]~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.204 ns" { clk clk~out0 u_ifclk~reg0 data_out[15]~reg0 } { 0.000ns 0.000ns 1.587ns 4.502ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" "" { Report "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo_cmp.qrpt" Compiler "wr_fifo" "UNKNOWN" "V1" "E:/68013_code/дFIFO/дFIFO/wr_fifo/db/wr_fifo.quartus_db" { Floorplan "E:/68013_code/дFIFO/дFIFO/wr_fifo/" "" "4.040 ns" { data_out[15]~reg0 data_out[15] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.040 ns" { data_out[15]~reg0 data_out[15] } { 0.000ns 1.932ns } { 0.000ns 2.108ns } } }  } 0}