📄 asyn_rd.tan.qmsg
字号:
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|WORD_SR\[0\] register sld_hub:sld_hub_inst\|hub_tdo 107.0 MHz 9.346 ns Internal " "Info: Clock \"altera_internal_jtag~TCKUTAP\" has Internal fmax of 107.0 MHz between source register \"sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|WORD_SR\[0\]\" and destination register \"sld_hub:sld_hub_inst\|hub_tdo\" (period= 9.346 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.398 ns + Longest register register " "Info: + Longest register to register delay is 4.398 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|WORD_SR\[0\] 1 REG LCFF_X25_Y7_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X25_Y7_N1; Fanout = 1; REG Node = 'sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|WORD_SR\[0\]'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } "NODE_NAME" } "" } } { "sld_rom_sr.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 33 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.342 ns) + CELL(0.636 ns) 1.978 ns sld_hub:sld_hub_inst\|hub_tdo~245 2 COMB LCCOMB_X26_Y9_N10 1 " "Info: 2: + IC(1.342 ns) + CELL(0.636 ns) = 1.978 ns; Loc. = LCCOMB_X26_Y9_N10; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~245'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.978 ns" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] sld_hub:sld_hub_inst|hub_tdo~245 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.098 ns) + CELL(0.210 ns) 3.286 ns sld_hub:sld_hub_inst\|hub_tdo~246 3 COMB LCCOMB_X26_Y8_N22 1 " "Info: 3: + IC(1.098 ns) + CELL(0.210 ns) = 3.286 ns; Loc. = LCCOMB_X26_Y8_N22; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~246'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.308 ns" { sld_hub:sld_hub_inst|hub_tdo~245 sld_hub:sld_hub_inst|hub_tdo~246 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.366 ns) + CELL(0.636 ns) 4.288 ns sld_hub:sld_hub_inst\|hub_tdo~250 4 COMB LCCOMB_X26_Y8_N26 1 " "Info: 4: + IC(0.366 ns) + CELL(0.636 ns) = 4.288 ns; Loc. = LCCOMB_X26_Y8_N26; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~250'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.002 ns" { sld_hub:sld_hub_inst|hub_tdo~246 sld_hub:sld_hub_inst|hub_tdo~250 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.110 ns) 4.398 ns sld_hub:sld_hub_inst\|hub_tdo 5 REG LCFF_X26_Y8_N27 1 " "Info: 5: + IC(0.000 ns) + CELL(0.110 ns) = 4.398 ns; Loc. = LCFF_X26_Y8_N27; Fanout = 1; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "0.110 ns" { sld_hub:sld_hub_inst|hub_tdo~250 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.592 ns 36.20 % " "Info: Total cell delay = 1.592 ns ( 36.20 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.806 ns 63.80 % " "Info: Total interconnect delay = 2.806 ns ( 63.80 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "4.398 ns" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] sld_hub:sld_hub_inst|hub_tdo~245 sld_hub:sld_hub_inst|hub_tdo~246 sld_hub:sld_hub_inst|hub_tdo~250 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.398 ns" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] sld_hub:sld_hub_inst|hub_tdo~245 sld_hub:sld_hub_inst|hub_tdo~246 sld_hub:sld_hub_inst|hub_tdo~250 sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.342ns 1.098ns 0.366ns 0.000ns } { 0.000ns 0.636ns 0.210ns 0.636ns 0.110ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.005 ns - Smallest " "Info: - Smallest clock skew is -0.005 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 1.738 ns + Shortest register " "Info: + Shortest clock path from clock \"altera_internal_jtag~TCKUTAP\" to destination register is 1.738 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y14_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y14_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 478 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = CLKCTRL_G3; Fanout = 478; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "0.000 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.059 ns) + CELL(0.679 ns) 1.738 ns sld_hub:sld_hub_inst\|hub_tdo 3 REG LCFF_X26_Y8_N27 1 " "Info: 3: + IC(1.059 ns) + CELL(0.679 ns) = 1.738 ns; Loc. = LCFF_X26_Y8_N27; Fanout = 1; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.738 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.679 ns 39.07 % " "Info: Total cell delay = 0.679 ns ( 39.07 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.059 ns 60.93 % " "Info: Total interconnect delay = 1.059 ns ( 60.93 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.738 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.738 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 0.000ns 1.059ns } { 0.000ns 0.000ns 0.679ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 1.743 ns - Longest register " "Info: - Longest clock path from clock \"altera_internal_jtag~TCKUTAP\" to source register is 1.743 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y14_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y14_N0; Fanout = 1; CLK Node = 'altera_internal_jtag~TCKUTAP'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAPclkctrl 2 COMB CLKCTRL_G3 478 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = CLKCTRL_G3; Fanout = 478; COMB Node = 'altera_internal_jtag~TCKUTAPclkctrl'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "0.000 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.064 ns) + CELL(0.679 ns) 1.743 ns sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|WORD_SR\[0\] 3 REG LCFF_X25_Y7_N1 1 " "Info: 3: + IC(1.064 ns) + CELL(0.679 ns) = 1.743 ns; Loc. = LCFF_X25_Y7_N1; Fanout = 1; REG Node = 'sld_hub:sld_hub_inst\|sld_rom_sr:HUB_INFO_REG\|WORD_SR\[0\]'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.743 ns" { altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } "NODE_NAME" } "" } } { "sld_rom_sr.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 33 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.679 ns 38.96 % " "Info: Total cell delay = 0.679 ns ( 38.96 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.064 ns 61.04 % " "Info: Total interconnect delay = 1.064 ns ( 61.04 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.743 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.743 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } { 0.000ns 0.000ns 1.064ns } { 0.000ns 0.000ns 0.679ns } } } } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.738 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.738 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 0.000ns 1.059ns } { 0.000ns 0.000ns 0.679ns } } } { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.743 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.743 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } { 0.000ns 0.000ns 1.064ns } { 0.000ns 0.000ns 0.679ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.310 ns + " "Info: + Micro clock to output delay of source is 0.310 ns" { } { { "sld_rom_sr.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 33 -1 0 } } } 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" { } { { "sld_rom_sr.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 33 -1 0 } } { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } } } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "4.398 ns" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] sld_hub:sld_hub_inst|hub_tdo~245 sld_hub:sld_hub_inst|hub_tdo~246 sld_hub:sld_hub_inst|hub_tdo~250 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.398 ns" { sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] sld_hub:sld_hub_inst|hub_tdo~245 sld_hub:sld_hub_inst|hub_tdo~246 sld_hub:sld_hub_inst|hub_tdo~250 sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 1.342ns 1.098ns 0.366ns 0.000ns } { 0.000ns 0.636ns 0.210ns 0.636ns 0.110ns } } } { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.738 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.738 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|hub_tdo } { 0.000ns 0.000ns 1.059ns } { 0.000ns 0.000ns 0.679ns } } } { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.743 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.743 ns" { altera_internal_jtag~TCKUTAP altera_internal_jtag~TCKUTAPclkctrl sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] } { 0.000ns 0.000ns 1.064ns } { 0.000ns 0.000ns 0.679ns } } } } 0}
{ "Info" "ITDB_TSU_RESULT" "sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[32\] rst clk 6.041 ns register " "Info: tsu for register \"sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[32\]\" (data pin = \"rst\", clock pin = \"clk\") is 6.041 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.057 ns + Longest pin register " "Info: + Longest pin to register delay is 9.057 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns rst 1 PIN PIN_AA3 2 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_AA3; Fanout = 2; PIN Node = 'rst'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { rst } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 29 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(7.654 ns) + CELL(0.469 ns) 9.057 ns sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[32\] 2 REG LCFF_X30_Y3_N17 3 " "Info: 2: + IC(7.654 ns) + CELL(0.469 ns) = 9.057 ns; Loc. = LCFF_X30_Y3_N17; Fanout = 3; REG Node = 'sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[32\]'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "8.123 ns" { rst sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } "NODE_NAME" } "" } } { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 437 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.403 ns 15.49 % " "Info: Total cell delay = 1.403 ns ( 15.49 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.654 ns 84.51 % " "Info: Total interconnect delay = 7.654 ns ( 84.51 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "9.057 ns" { rst sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.057 ns" { rst rst~combout sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } { 0.000ns 0.000ns 7.654ns } { 0.000ns 0.934ns 0.469ns } } } } 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 437 -1 0 } } } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.976 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.976 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_W12 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_W12; Fanout = 1; CLK Node = 'clk'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { clk } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 30 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.117 ns) + CELL(0.000 ns) 1.217 ns clk~clkctrl 2 COMB CLKCTRL_G14 430 " "Info: 2: + IC(0.117 ns) + CELL(0.000 ns) = 1.217 ns; Loc. = CLKCTRL_G14; Fanout = 430; COMB Node = 'clk~clkctrl'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "0.117 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 30 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.080 ns) + CELL(0.679 ns) 2.976 ns sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[32\] 3 REG LCFF_X30_Y3_N17 3 " "Info: 3: + IC(1.080 ns) + CELL(0.679 ns) = 2.976 ns; Loc. = LCFF_X30_Y3_N17; Fanout = 3; REG Node = 'sld_signaltap:auto_signaltap_0\|acq_trigger_in_reg\[32\]'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.759 ns" { clk~clkctrl sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } "NODE_NAME" } "" } } { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 437 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.779 ns 59.78 % " "Info: Total cell delay = 1.779 ns ( 59.78 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.197 ns 40.22 % " "Info: Total interconnect delay = 1.197 ns ( 40.22 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "2.976 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.976 ns" { clk clk~combout clk~clkctrl sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } { 0.000ns 0.000ns 0.117ns 1.080ns } { 0.000ns 1.100ns 0.000ns 0.679ns } } } } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "9.057 ns" { rst sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "9.057 ns" { rst rst~combout sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } { 0.000ns 0.000ns 7.654ns } { 0.000ns 0.934ns 0.469ns } } } { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "2.976 ns" { clk clk~clkctrl sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.976 ns" { clk clk~combout clk~clkctrl sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[32] } { 0.000ns 0.000ns 0.117ns 1.080ns } { 0.000ns 1.100ns 0.000ns 0.679ns } } } } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk u_slrd u_slrd~reg0 9.785 ns register " "Info: tco from clock \"clk\" to destination pin \"u_slrd\" through register \"u_slrd~reg0\" is 9.785 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 4.383 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 4.383 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns clk 1 CLK PIN_W12 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_W12; Fanout = 1; CLK Node = 'clk'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { clk } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 30 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.117 ns) + CELL(0.000 ns) 1.217 ns clk~clkctrl 2 COMB CLKCTRL_G14 430 " "Info: 2: + IC(0.117 ns) + CELL(0.000 ns) = 1.217 ns; Loc. = CLKCTRL_G14; Fanout = 430; COMB Node = 'clk~clkctrl'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "0.117 ns" { clk clk~clkctrl } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 30 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.080 ns) + CELL(0.989 ns) 3.286 ns u_ifclk~reg0 3 REG LCFF_X30_Y3_N1 3 " "Info: 3: + IC(1.080 ns) + CELL(0.989 ns) = 3.286 ns; Loc. = LCFF_X30_Y3_N1; Fanout = 3; REG Node = 'u_ifclk~reg0'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "2.069 ns" { clk~clkctrl u_ifclk~reg0 } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 98 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.418 ns) + CELL(0.679 ns) 4.383 ns u_slrd~reg0 4 REG LCFF_X30_Y3_N27 2 " "Info: 4: + IC(0.418 ns) + CELL(0.679 ns) = 4.383 ns; Loc. = LCFF_X30_Y3_N27; Fanout = 2; REG Node = 'u_slrd~reg0'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "1.097 ns" { u_ifclk~reg0 u_slrd~reg0 } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 80 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.768 ns 63.15 % " "Info: Total cell delay = 2.768 ns ( 63.15 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.615 ns 36.85 % " "Info: Total interconnect delay = 1.615 ns ( 36.85 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "4.383 ns" { clk clk~clkctrl u_ifclk~reg0 u_slrd~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.383 ns" { clk clk~combout clk~clkctrl u_ifclk~reg0 u_slrd~reg0 } { 0.000ns 0.000ns 0.117ns 1.080ns 0.418ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.679ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.310 ns + " "Info: + Micro clock to output delay of source is 0.310 ns" { } { { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 80 -1 0 } } } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.092 ns + Longest register pin " "Info: + Longest register to pin delay is 5.092 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns u_slrd~reg0 1 REG LCFF_X30_Y3_N27 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X30_Y3_N27; Fanout = 2; REG Node = 'u_slrd~reg0'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "" { u_slrd~reg0 } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 80 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.005 ns) + CELL(3.087 ns) 5.092 ns u_slrd 2 PIN PIN_AA20 0 " "Info: 2: + IC(2.005 ns) + CELL(3.087 ns) = 5.092 ns; Loc. = PIN_AA20; Fanout = 0; PIN Node = 'u_slrd'" { } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "5.092 ns" { u_slrd~reg0 u_slrd } "NODE_NAME" } "" } } { "asyn_rd.v" "" { Text "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/asyn_rd.v" 39 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.087 ns 60.62 % " "Info: Total cell delay = 3.087 ns ( 60.62 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.005 ns 39.38 % " "Info: Total interconnect delay = 2.005 ns ( 39.38 % )" { } { } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "5.092 ns" { u_slrd~reg0 u_slrd } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.092 ns" { u_slrd~reg0 u_slrd } { 0.000ns 2.005ns } { 0.000ns 3.087ns } } } } 0} } { { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "4.383 ns" { clk clk~clkctrl u_ifclk~reg0 u_slrd~reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "4.383 ns" { clk clk~combout clk~clkctrl u_ifclk~reg0 u_slrd~reg0 } { 0.000ns 0.000ns 0.117ns 1.080ns 0.418ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.679ns } } } { "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" "" { Report "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd_cmp.qrpt" Compiler "asyn_rd" "UNKNOWN" "V1" "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/db/asyn_rd.quartus_db" { Floorplan "E:/code/EP2C20/T1_USB/READ_FIFO/rd_fifo/" "" "5.092 ns" { u_slrd~reg0 u_slrd } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.092 ns" { u_slrd~reg0 u_slrd } { 0.000ns 2.005ns } { 0.000ns 3.087ns } } } } 0}
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