vgacore.vhd

基于spartan3火龙刀系列FPGA开发板制作的VGA实验例程

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;

entity vgacore is
	port
	(
		reset : in std_logic;	-- reset
		clock : in std_logic;	-- VGA dot clock
		hsyncb : buffer std_logic;	-- horizontal (line) sync
		vsyncb : buffer std_logic;	-- vertical (frame) sync
      hcnt : buffer std_logic_vector(9 downto 0);	-- horizontal pixel counter
      vcnt : buffer std_logic_vector(9 downto 0)	-- vertical line counter
);
end vgacore;

architecture vgacore_arch of vgacore is

begin


A: process(clock,reset)
begin
	-- reset asynchronously clears pixel counter
	if reset='0' then
		hcnt <= "0000000000";
	-- horiz. pixel counter increments on rising edge of dot clock
	elsif (clock'event and clock='1') then
		-- horiz. pixel counter rolls-over after 381 pixels
		if hcnt<800 then
			hcnt <= hcnt + 1;
		else
			hcnt <= "0000000000";
		end if;
	end if;
end process;

B: process(hsyncb,reset)
begin
	-- reset asynchronously clears line counter
	if reset='0' then
		vcnt <= "0000000000";
	-- vert. line counter increments after every horiz. line
	elsif (hsyncb'event and hsyncb='1') then
		-- vert. line counter rolls-over after 528 lines
		if vcnt<524 then
			vcnt <= vcnt + 1;
		else
			vcnt <= "0000000000";
		end if;
	end if;
end process;

C: process(clock,reset)
begin
	-- reset asynchronously sets horizontal sync to inactive
	if reset='0' then
		hsyncb <= '1';
	-- horizontal sync is recomputed on the rising edge of every dot clock
	elsif (clock'event and clock='1') then
		-- horiz. sync is low in this interval to signal start of a new line
		if (hcnt>=656 and hcnt<=751) then -- and hcnt<=800) then
			hsyncb <= '1';
		else
			hsyncb <= '0';
		end if;
	end if;
end process;

D: process(hsyncb,reset)
begin
	-- reset asynchronously sets vertical sync to inactive
	if reset='0' then
		vsyncb <= '1';
	-- vertical sync is recomputed at the end of every line of pixels
	elsif (hsyncb'event and hsyncb='1') then
		-- vert. sync is low in this interval to signal start of a new frame
		if (vcnt>=491 and vcnt<=492) then
			vsyncb <= '1';
		else
			vsyncb <= '0';
		end if;
	end if;
end process;

end vgacore_arch;