uartrec.log

PCM数据采集

#Build: Synplify for Lattice 9.0L1, Build 024R, Nov 13 2007
#install: D:\ISPTOOLS7_0\SYNPBASE
#OS: Windows XP 5.1
#Hostname: STAR-PANCAT

#Implementation: getpcm

#Wed Jun 18 10:57:14 2008

$ Start of Compile
#Wed Jun 18 10:57:14 2008

Synplicity VHDL Compiler, version 1.0, Build 157R, built Nov 13 2007
Copyright (C) 1994-2007, Synplicity Inc.  All Rights Reserved

@N: CD720 :"D:\ISPTOOLS7_0\SYNPBASE\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N:"D:\cpld\fpga\getpcm\uartrec.vhd":6:7:6:13|Top entity is set to UartRec.
@W: CD266 :"D:\cpld\fpga\getpcm\uartrec.vhd":21:15:21:21|getdata is not readable.  This may cause a simulation mismatch.
@E: CD185 :"D:\cpld\fpga\getpcm\uartrec.vhd":21:22:21:22|Expecting readable signal name, got output:getdata
1 error parsing file D:\cpld\fpga\getpcm\uartrec.vhd
@END
@E|Parse errors encountered - exiting
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Jun 18 10:57:14 2008

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Total runtime: 00h:00m:00s realtime