fifo_dc.vhd.bak

PCM数据采集

    FF_41: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_0, CK=>RdClock, CD=>Reset, Q=>w_gcount_r0);

    FF_40: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_1, CK=>RdClock, CD=>Reset, Q=>w_gcount_r1);

    FF_39: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_2, CK=>RdClock, CD=>Reset, Q=>w_gcount_r2);

    FF_38: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_3, CK=>RdClock, CD=>Reset, Q=>w_gcount_r3);

    FF_37: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_4, CK=>RdClock, CD=>Reset, Q=>w_gcount_r4);

    FF_36: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_5, CK=>RdClock, CD=>Reset, Q=>w_gcount_r5);

    FF_35: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_6, CK=>RdClock, CD=>Reset, Q=>w_gcount_r6);

    FF_34: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_7, CK=>RdClock, CD=>Reset, Q=>w_gcount_r7);

    FF_33: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_8, CK=>RdClock, CD=>Reset, Q=>w_gcount_r8);

    FF_32: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_9, CK=>RdClock, CD=>Reset, Q=>w_gcount_r9);

    FF_31: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_0, CK=>WrClock, CD=>rRst, Q=>r_gcount_w0);

    FF_30: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_1, CK=>WrClock, CD=>rRst, Q=>r_gcount_w1);

    FF_29: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_2, CK=>WrClock, CD=>rRst, Q=>r_gcount_w2);

    FF_28: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_3, CK=>WrClock, CD=>rRst, Q=>r_gcount_w3);

    FF_27: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_4, CK=>WrClock, CD=>rRst, Q=>r_gcount_w4);

    FF_26: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_5, CK=>WrClock, CD=>rRst, Q=>r_gcount_w5);

    FF_25: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_6, CK=>WrClock, CD=>rRst, Q=>r_gcount_w6);

    FF_24: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_7, CK=>WrClock, CD=>rRst, Q=>r_gcount_w7);

    FF_23: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_8, CK=>WrClock, CD=>rRst, Q=>r_gcount_w8);

    FF_22: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_9, CK=>WrClock, CD=>rRst, Q=>r_gcount_w9);

    FF_21: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r0, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r20);

    FF_20: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r1, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r21);

    FF_19: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r2, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r22);

    FF_18: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r3, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r23);

    FF_17: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r4, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r24);

    FF_16: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r5, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r25);

    FF_15: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r6, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r26);

    FF_14: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r7, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r27);

    FF_13: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r8, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r28);

    FF_12: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>w_gcount_r9, CK=>RdClock, CD=>Reset, 
            Q=>w_gcount_r29);

    FF_11: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w0, CK=>WrClock, CD=>rRst, Q=>r_gcount_w20);

    FF_10: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w1, CK=>WrClock, CD=>rRst, Q=>r_gcount_w21);

    FF_9: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w2, CK=>WrClock, CD=>rRst, Q=>r_gcount_w22);

    FF_8: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w3, CK=>WrClock, CD=>rRst, Q=>r_gcount_w23);

    FF_7: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w4, CK=>WrClock, CD=>rRst, Q=>r_gcount_w24);

    FF_6: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w5, CK=>WrClock, CD=>rRst, Q=>r_gcount_w25);

    FF_5: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w6, CK=>WrClock, CD=>rRst, Q=>r_gcount_w26);

    FF_4: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w7, CK=>WrClock, CD=>rRst, Q=>r_gcount_w27);

    FF_3: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w8, CK=>WrClock, CD=>rRst, Q=>r_gcount_w28);

    FF_2: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>r_gcount_w9, CK=>WrClock, CD=>rRst, Q=>r_gcount_w29);

    FF_1: FD1S3BX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>empty_d, CK=>RdClock, PD=>rRst, Q=>empty_i);

    FF_0: FD1S3DX
        -- synopsys translate_off
        generic map (GSR=> "ENABLED")
        -- synopsys translate_on
        port map (D=>full_d, CK=>WrClock, CD=>Reset, Q=>full_i);

    w_gctr_cia: FADD2B
        port map (A0=>scuba_vlo, A1=>scuba_vhi, B0=>scuba_vlo, 
            B1=>scuba_vhi, CI=>scuba_vlo, COUT=>w_gctr_ci, S0=>open, 
            S1=>open);

    w_gctr_0: CU2
        port map (CI=>w_gctr_ci, PC0=>wcount_0, PC1=>wcount_1, CO=>co0, 
            NC0=>iwcount_0, NC1=>iwcount_1);

    w_gctr_1: CU2
        port map (CI=>co0, PC0=>wcount_2, PC1=>wcount_3, CO=>co1, 
            NC0=>iwcount_2, NC1=>iwcount_3);

    w_gctr_2: CU2
        port map (CI=>co1, PC0=>wcount_4, PC1=>wcount_5, CO=>co2, 
            NC0=>iwcount_4, NC1=>iwcount_5);

    w_gctr_3: CU2
        port map (CI=>co2, PC0=>wcount_6, PC1=>wcount_7, CO=>co3, 
            NC0=>iwcount_6, NC1=>iwcount_7);

    w_gctr_4: CU2
        port map (CI=>co3, PC0=>wcount_8, PC1=>wcount_9, CO=>co4, 
            NC0=>iwcount_8, NC1=>iwcount_9);

    scuba_vhi_inst: VHI
        port map (Z=>scuba_vhi);

    r_gctr_cia: FADD2B
        port map (A0=>scuba_vlo, A1=>scuba_vhi, B0=>scuba_vlo, 
            B1=>scuba_vhi, CI=>scuba_vlo, COUT=>r_gctr_ci, S0=>open, 
            S1=>open);

    r_gctr_0: CU2
        port map (CI=>r_gctr_ci, PC0=>rcount_0, PC1=>rcount_1, CO=>co0_1, 
            NC0=>ircount_0, NC1=>ircount_1);

    r_gctr_1: CU2
        port map (CI=>co0_1, PC0=>rcount_2, PC1=>rcount_3, CO=>co1_1, 
            NC0=>ircount_2, NC1=>ircount_3);

    r_gctr_2: CU2
        port map (CI=>co1_1, PC0=>rcount_4, PC1=>rcount_5, CO=>co2_1, 
            NC0=>ircount_4, NC1=>ircount_5);

    r_gctr_3: CU2
        port map (CI=>co2_1, PC0=>rcount_6, PC1=>rcount_7, CO=>co3_1, 
            NC0=>ircount_6, NC1=>ircount_7);

    r_gctr_4: CU2
        port map (CI=>co3_1, PC0=>rcount_8, PC1=>rcount_9, CO=>co4_1, 
            NC0=>ircount_8, NC1=>ircount_9);

    empty_cmp_ci_a: FADD2B
        port map (A0=>scuba_vlo, A1=>rden_i, B0=>scuba_vlo, B1=>rden_i, 
            CI=>scuba_vlo, COUT=>cmp_ci, S0=>open, S1=>open);

    empty_cmp_0: AGEB2
        port map (A0=>rcount_0, A1=>rcount_1, B0=>wcount_r0, 
            B1=>wcount_r1, CI=>cmp_ci, GE=>co0_2);

    empty_cmp_1: AGEB2
        port map (A0=>rcount_2, A1=>rcount_3, B0=>wcount_r2, 
            B1=>wcount_r3, CI=>co0_2, GE=>co1_2);

    empty_cmp_2: AGEB2
        port map (A0=>rcount_4, A1=>rcount_5, B0=>wcount_r4, 
            B1=>wcount_r5, CI=>co1_2, GE=>co2_2);

    empty_cmp_3: AGEB2
        port map (A0=>rcount_6, A1=>rcount_7, B0=>w_g2b_xor_cluster_0, 
            B1=>wcount_r7, CI=>co2_2, GE=>co3_2);

    empty_cmp_4: AGEB2
        port map (A0=>rcount_8, A1=>empty_cmp_set, B0=>wcount_r8, 
            B1=>empty_cmp_clr, CI=>co3_2, GE=>empty_d_c);

    a0: FADD2B
        port map (A0=>scuba_vlo, A1=>scuba_vlo, B0=>scuba_vlo, 
            B1=>scuba_vlo, CI=>empty_d_c, COUT=>open, S0=>empty_d, 
            S1=>open);

    full_cmp_ci_a: FADD2B
        port map (A0=>scuba_vlo, A1=>wren_i, B0=>scuba_vlo, B1=>wren_i, 
            CI=>scuba_vlo, COUT=>cmp_ci_1, S0=>open, S1=>open);

    full_cmp_0: AGEB2
        port map (A0=>wcount_0, A1=>wcount_1, B0=>rcount_w0, 
            B1=>rcount_w1, CI=>cmp_ci_1, GE=>co0_3);

    full_cmp_1: AGEB2
        port map (A0=>wcount_2, A1=>wcount_3, B0=>rcount_w2, 
            B1=>rcount_w3, CI=>co0_3, GE=>co1_3);

    full_cmp_2: AGEB2
        port map (A0=>wcount_4, A1=>wcount_5, B0=>rcount_w4, 
            B1=>rcount_w5, CI=>co1_3, GE=>co2_3);

    full_cmp_3: AGEB2
        port map (A0=>wcount_6, A1=>wcount_7, B0=>r_g2b_xor_cluster_0, 
            B1=>rcount_w7, CI=>co2_3, GE=>co3_3);

    full_cmp_4: AGEB2
        port map (A0=>wcount_8, A1=>full_cmp_set, B0=>rcount_w8, 
            B1=>full_cmp_clr, CI=>co3_3, GE=>full_d_c);

    scuba_vlo_inst: VLO
        port map (Z=>scuba_vlo);

    a1: FADD2B
        port map (A0=>scuba_vlo, A1=>scuba_vlo, B0=>scuba_vlo, 
            B1=>scuba_vlo, CI=>full_d_c, COUT=>open, S0=>full_d, 
            S1=>open);

    Empty <= empty_i;
    Full <= full_i;
end Structure;

-- synopsys translate_off
library xp2;
configuration Structure_CON of FIFO_DC is
    for Structure
        for all:AGEB2 use entity xp2.AGEB2(V); end for;
        for all:AND2 use entity xp2.AND2(V); end for;
        for all:CU2 use entity xp2.CU2(V); end for;
        for all:FADD2B use entity xp2.FADD2B(V); end for;
        for all:FD1P3BX use entity xp2.FD1P3BX(V); end for;
        for all:FD1P3DX use entity xp2.FD1P3DX(V); end for;
        for all:FD1S3BX use entity xp2.FD1S3BX(V); end for;
        for all:FD1S3DX use entity xp2.FD1S3DX(V); end for;
        for all:INV use entity xp2.INV(V); end for;
        for all:OR2 use entity xp2.OR2(V); end for;
        for all:ROM16X1 use entity xp2.ROM16X1(V); end for;
        for all:VHI use entity xp2.VHI(V); end for;
        for all:VLO use entity xp2.VLO(V); end for;
        for all:XOR2 use entity xp2.XOR2(V); end for;
        for all:PDPW16KB use entity xp2.PDPW16KB(V); end for;
    end for;
end Structure_CON;

-- synopsys translate_on