led.tan.rpt
来自「FPGA和VHDL的全过程和源码」· RPT 代码 · 共 240 行 · 第 1/5 页
RPT
240 行
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[6] ; led:inst|q1[3] ; clk ; clk ; None ; None ; 2.951 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[1] ; led:inst|present.s1 ; clk ; clk ; None ; None ; 2.947 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[2] ; led:inst|q1[7] ; clk ; clk ; None ; None ; 2.922 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[7] ; led:inst|q1[3] ; clk ; clk ; None ; None ; 2.916 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|present.s0 ; led:inst|count[0] ; clk ; clk ; None ; None ; 2.892 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[2] ; led:inst|q1[6] ; clk ; clk ; None ; None ; 2.867 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[1] ; led:inst|q1[4] ; clk ; clk ; None ; None ; 2.852 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[1] ; led:inst|q1[3] ; clk ; clk ; None ; None ; 2.848 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[2] ; led:inst|q1[5] ; clk ; clk ; None ; None ; 2.841 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[7] ; led:inst|q1[7] ; clk ; clk ; None ; None ; 2.840 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[0] ; led:inst|present.s2 ; clk ; clk ; None ; None ; 2.840 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[23] ; clk ; clk ; None ; None ; 2.835 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[22] ; clk ; clk ; None ; None ; 2.835 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[5] ; led:inst|q1[1] ; clk ; clk ; None ; None ; 2.824 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[5] ; led:inst|present.s0 ; clk ; clk ; None ; None ; 2.820 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[5] ; led:inst|q1[2] ; clk ; clk ; None ; None ; 2.820 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[1] ; led:inst|q1[7] ; clk ; clk ; None ; None ; 2.772 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[4] ; led:inst|present.s1 ; clk ; clk ; None ; None ; 2.763 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[23] ; clk ; clk ; None ; None ; 2.760 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[22] ; clk ; clk ; None ; None ; 2.760 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[21] ; clk ; clk ; None ; None ; 2.758 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[20] ; clk ; clk ; None ; None ; 2.758 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[19] ; clk ; clk ; None ; None ; 2.758 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[18] ; clk ; clk ; None ; None ; 2.758 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[3] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[17] ; clk ; clk ; None ; None ; 2.758 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|present.s3 ; led:inst|q1[5] ; clk ; clk ; None ; None ; 2.758 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[23] ; clk ; clk ; None ; None ; 2.754 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[22] ; clk ; clk ; None ; None ; 2.754 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[0] ; led:inst|count[2] ; clk ; clk ; None ; None ; 2.749 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[6] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[23] ; clk ; clk ; None ; None ; 2.686 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[6] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[22] ; clk ; clk ; None ; None ; 2.686 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[21] ; clk ; clk ; None ; None ; 2.683 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[20] ; clk ; clk ; None ; None ; 2.683 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[19] ; clk ; clk ; None ; None ; 2.683 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[18] ; clk ; clk ; None ; None ; 2.683 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[4] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[17] ; clk ; clk ; None ; None ; 2.683 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[0] ; led:inst|q1[5] ; clk ; clk ; None ; None ; 2.683 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[21] ; clk ; clk ; None ; None ; 2.677 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[20] ; clk ; clk ; None ; None ; 2.677 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[19] ; clk ; clk ; None ; None ; 2.677 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[18] ; clk ; clk ; None ; None ; 2.677 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[2] ; lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[17] ; clk ; clk ; None ; None ; 2.677 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|present.s1 ; led:inst|q1[5] ; clk ; clk ; None ; None ; 2.676 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[1] ; led:inst|present.s2 ; clk ; clk ; None ; None ; 2.673 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|count[0] ; led:inst|present.s0 ; clk ; clk ; None ; None ; 2.670 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|present.s3 ; led:inst|q1[6] ; clk ; clk ; None ; None ; 2.668 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; led:inst|q1[4] ; led:inst|q1[4] ; clk ; clk ; None ; None ; 2.668 ns ;
; N/A ; Restricted to 275.03 MHz ( perio⌨️ 快捷键说明
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