led.map.rpt

FPGA和VHDL的全过程和源码

+----------------------------------------------+-------+
; Total registers                              ; 39    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 12    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 3     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                           ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |myled|led:inst|count[0]   ;
; 5:1                ; 2 bits    ; 6 LEs         ; 4 LEs                ; 2 LEs                  ; Yes        ; |myled|led:inst|q1[2]      ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; Yes        ; |myled|led:inst|q1[4]      ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+


+-----------------------------------------------------------------------------+
; Source assignments for lpm_counter0:inst1|lpm_counter:lpm_counter_component ;
+---------------------------+-------+------+----------------------------------+
; Assignment                ; Value ; From ; To                               ;
+---------------------------+-------+------+----------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; a101  ; -    ; -                                ;
; SUPPRESS_DA_RULE_INTERNAL ; s102  ; -    ; -                                ;
; SUPPRESS_DA_RULE_INTERNAL ; s103  ; -    ; -                                ;
+---------------------------+-------+------+----------------------------------+


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lpm_counter0:inst1|lpm_counter:lpm_counter_component ;
+------------------------+-------------+------------------------------------------------------------+
; Parameter Name         ; Value       ; Type                                                       ;
+------------------------+-------------+------------------------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                                                 ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                                               ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                                               ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                                             ;
; LPM_WIDTH              ; 26          ; Signed Integer                                             ;
; LPM_DIRECTION          ; UP          ; Untyped                                                    ;
; LPM_MODULUS            ; 0           ; Untyped                                                    ;
; LPM_AVALUE             ; UNUSED      ; Untyped                                                    ;
; LPM_SVALUE             ; UNUSED      ; Untyped                                                    ;
; LPM_PORT_UPDOWN        ; PORT_UNUSED ; Untyped                                                    ;
; DEVICE_FAMILY          ; Cyclone     ; Untyped                                                    ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                                                    ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                                         ;
; NOT_GATE_PUSH_BACK     ; ON          ; NOT_GATE_PUSH_BACK                                         ;
; CARRY_CNT_EN           ; SMART       ; Untyped                                                    ;
; LABWIDE_SCLR           ; ON          ; Untyped                                                    ;
; USE_NEW_VERSION        ; TRUE        ; Untyped                                                    ;
; CBXI_PARAMETER         ; cntr_qeh    ; Untyped                                                    ;
+------------------------+-------------+------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Wed Apr 23 11:32:34 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off led -c led
Info: Found 2 design units, including 1 entities, in source file lpm_counter0.vhd
    Info: Found design unit 1: lpm_counter0-SYN
    Info: Found entity 1: lpm_counter0
Info: Found 2 design units, including 1 entities, in source file led.vhd
    Info: Found design unit 1: led-one
    Info: Found entity 1: led
Info: Found 1 design units, including 1 entities, in source file myled.bdf
    Info: Found entity 1: myled
Info: Elaborating entity "myled" for the top level hierarchy
Info: Elaborating entity "led" for hierarchy "led:inst"
Info: Elaborating entity "lpm_counter0" for hierarchy "lpm_counter0:inst1"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborating entity "lpm_counter" for hierarchy "lpm_counter0:inst1|lpm_counter:lpm_counter_component"
Info: Elaborated megafunction instantiation "lpm_counter0:inst1|lpm_counter:lpm_counter_component"
Info: Found 1 design units, including 1 entities, in source file db/cntr_qeh.tdf
    Info: Found entity 1: cntr_qeh
Info: Elaborating entity "cntr_qeh" for hierarchy "lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated"
Info: State machine "|myled|led:inst|present" contains 4 states
Info: Selected Auto state machine encoding method for state machine "|myled|led:inst|present"
Info: Encoding result for state machine "|myled|led:inst|present"
    Info: Completed encoding using 4 state bits
        Info: Encoded state bit "led:inst|present.s3"
        Info: Encoded state bit "led:inst|present.s2"
        Info: Encoded state bit "led:inst|present.s1"
        Info: Encoded state bit "led:inst|present.s0"
    Info: State "|myled|led:inst|present.s0" uses code string "0000"
    Info: State "|myled|led:inst|present.s1" uses code string "0011"
    Info: State "|myled|led:inst|present.s2" uses code string "0101"
    Info: State "|myled|led:inst|present.s3" uses code string "1001"
Warning (14130): Reduced register "led:inst|count[3]" with stuck data_in port to stuck value GND
Info: 2 registers lost all their fanouts during netlist optimizations. The first 2 are displayed below.
    Info: Register "lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[24]" lost all its fanouts during netlist optimizations.
    Info: Register "lpm_counter0:inst1|lpm_counter:lpm_counter_component|cntr_qeh:auto_generated|safe_q[25]" lost all its fanouts during netlist optimizations.
Info: Implemented 76 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 8 output pins
    Info: Implemented 66 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
    Info: Allocated 165 megabytes of memory during processing
    Info: Processing ended: Wed Apr 23 11:32:40 2008
    Info: Elapsed time: 00:00:06