jp4x4.sim.rpt

FPGA和VHDL的全过程和源码

; |jp4x4_test|jp4x4:inst|seg7[5]                                                                          ; |jp4x4_test|jp4x4:inst|seg7[5]                                                                                    ; regout           ;
; |jp4x4_test|jp4x4:inst|seg7[4]                                                                          ; |jp4x4_test|jp4x4:inst|seg7[4]                                                                                    ; regout           ;
; |jp4x4_test|jp4x4:inst|seg7[3]                                                                          ; |jp4x4_test|jp4x4:inst|seg7[3]                                                                                    ; regout           ;
; |jp4x4_test|jp4x4:inst|seg7[2]                                                                          ; |jp4x4_test|jp4x4:inst|seg7[2]                                                                                    ; regout           ;
; |jp4x4_test|jp4x4:inst|seg7[1]                                                                          ; |jp4x4_test|jp4x4:inst|seg7[1]                                                                                    ; regout           ;
; |jp4x4_test|jp4x4:inst|seg7[0]                                                                          ; |jp4x4_test|jp4x4:inst|seg7[0]                                                                                    ; regout           ;
; |jp4x4_test|jp4x4:inst|Mux17~69                                                                         ; |jp4x4_test|jp4x4:inst|Mux17~69                                                                                   ; combout          ;
; |jp4x4_test|jp4x4:inst|dat[0]                                                                           ; |jp4x4_test|jp4x4:inst|dat[0]                                                                                     ; regout           ;
; |jp4x4_test|jp4x4:inst|dat[4]                                                                           ; |jp4x4_test|jp4x4:inst|dat[4]                                                                                     ; regout           ;
; |jp4x4_test|jp4x4:inst|dat[3]                                                                           ; |jp4x4_test|jp4x4:inst|dat[3]                                                                                     ; regout           ;
; |jp4x4_test|jp4x4:inst|fn~34                                                                            ; |jp4x4_test|jp4x4:inst|fn~34                                                                                      ; combout          ;
; |jp4x4_test|jp4x4:inst|dat[2]                                                                           ; |jp4x4_test|jp4x4:inst|dat[2]                                                                                     ; regout           ;
; |jp4x4_test|jp4x4:inst|dat[1]                                                                           ; |jp4x4_test|jp4x4:inst|dat[1]                                                                                     ; regout           ;
; |jp4x4_test|jp4x4:inst|fn~3                                                                             ; |jp4x4_test|jp4x4:inst|fn~3                                                                                       ; combout          ;
; |jp4x4_test|jp4x4:inst|Mux5~37                                                                          ; |jp4x4_test|jp4x4:inst|Mux5~37                                                                                    ; combout          ;
; |jp4x4_test|jp4x4:inst|sta[1]                                                                           ; |jp4x4_test|jp4x4:inst|sta[1]                                                                                     ; regout           ;
; |jp4x4_test|kbrow[3]                                                                                    ; |jp4x4_test|kbrow[3]                                                                                              ; padio            ;
; |jp4x4_test|kbrow[2]                                                                                    ; |jp4x4_test|kbrow[2]                                                                                              ; padio            ;
; |jp4x4_test|kbrow[1]                                                                                    ; |jp4x4_test|kbrow[1]                                                                                              ; padio            ;
; |jp4x4_test|kbrow[0]                                                                                    ; |jp4x4_test|kbrow[0]                                                                                              ; padio            ;
; |jp4x4_test|scan[3]                                                                                     ; |jp4x4_test|scan[3]                                                                                               ; padio            ;
; |jp4x4_test|scan[2]                                                                                     ; |jp4x4_test|scan[2]                                                                                               ; padio            ;
; |jp4x4_test|scan[1]                                                                                     ; |jp4x4_test|scan[1]                                                                                               ; padio            ;
; |jp4x4_test|scan[0]                                                                                     ; |jp4x4_test|scan[0]                                                                                               ; padio            ;
; |jp4x4_test|seg7_out[6]                                                                                 ; |jp4x4_test|seg7_out[6]                                                                                           ; padio            ;
; |jp4x4_test|seg7_out[5]                                                                                 ; |jp4x4_test|seg7_out[5]                                                                                           ; padio            ;
; |jp4x4_test|seg7_out[4]                                                                                 ; |jp4x4_test|seg7_out[4]                                                                                           ; padio            ;
; |jp4x4_test|seg7_out[3]                                                                                 ; |jp4x4_test|seg7_out[3]                                                                                           ; padio            ;
; |jp4x4_test|seg7_out[2]                                                                                 ; |jp4x4_test|seg7_out[2]                                                                                           ; padio            ;
; |jp4x4_test|seg7_out[1]                                                                                 ; |jp4x4_test|seg7_out[1]                                                                                           ; padio            ;
; |jp4x4_test|seg7_out[0]                                                                                 ; |jp4x4_test|seg7_out[0]                                                                                           ; padio            ;
; |jp4x4_test|kbcol[3]                                                                                    ; |jp4x4_test|kbcol[3]~corein                                                                                       ; combout          ;
+---------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Sun Apr 20 11:59:44 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off jp4x4 -c jp4x4
Info: Using vector source file "D:/lecture/embed/FPGA/FPGAExample/jp4x4/jp4x4.vwf"
Warning: Ignored node in vector source file. Can't find corresponding node name "dat[4]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "dat[3]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "dat[2]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "dat[1]" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "dat[0]" in design.
Info: Inverted registers were found during simulation
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[6]
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[5]
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[4]
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[3]
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[2]
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[1]
    Info: Register: |jp4x4_test|jp4x4:inst|seg7[0]
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      37.21 %
Info: Number of transitions in simulation is 1040
Info: Quartus II Simulator was successful. 0 errors, 5 warnings
    Info: Allocated 100 megabytes of memory during processing
    Info: Processing ended: Sun Apr 20 11:59:46 2008
    Info: Elapsed time: 00:00:02