jp4x4.fnsim.qmsg

FPGA和VHDL的全过程和源码

{ "Info" "ISGN_MEGAFN_PARAM_TOP" "jp4x4:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"jp4x4:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 2 " "Info: Parameter \"LPM_WIDTH\" = \"2\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "a_csnbuffer.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "jp4x4:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node jp4x4:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/addcore.tdf" 97 2 0 } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "jp4x4:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"jp4x4:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 2 " "Info: Parameter \"LPM_WIDTH\" = \"2\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "jp4x4:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node jp4x4:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:result_node\", which is child of megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/addcore.tdf" 123 6 0 } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "jp4x4:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"jp4x4:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 2 " "Info: Parameter \"LPM_WIDTH\" = \"2\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/altshift.tdf" 30 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "jp4x4:inst\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs jp4x4:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "jp4x4:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"jp4x4:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 2 " "Info: Parameter \"LPM_WIDTH\" = \"2\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "jp4x4:inst\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs jp4x4:inst\|lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"jp4x4:inst\|lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "jp4x4:inst\|lpm_add_sub:Add0 " "Info: Instantiated megafunction \"jp4x4:inst\|lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 2 " "Info: Parameter \"LPM_WIDTH\" = \"2\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_unsi.vhd" 117 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/lpm_mux.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/lpm_mux.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_mux " "Info: Found entity 1: lpm_mux" {  } { { "lpm_mux.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_mux.tdf" 74 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "jp4x4:inst\|lpm_mux:Mux0 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_mux:Mux0\"" {  } { { "jp4x4.vhd" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/jp4x4.vhd" 30 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_cfc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_cfc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_cfc " "Info: Found entity 1: mux_cfc" {  } { { "db/mux_cfc.tdf" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/db/mux_cfc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "jp4x4:inst\|lpm_mux:Mux1 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_mux:Mux1\"" {  } { { "jp4x4.vhd" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/jp4x4.vhd" 30 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "jp4x4:inst\|lpm_mux:Mux2 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_mux:Mux2\"" {  } { { "jp4x4.vhd" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/jp4x4.vhd" 30 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "jp4x4:inst\|lpm_mux:Mux3 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_mux:Mux3\"" {  } { { "jp4x4.vhd" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/jp4x4.vhd" 30 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "jp4x4:inst\|lpm_mux:Mux4 " "Info: Elaborated megafunction instantiation \"jp4x4:inst\|lpm_mux:Mux4\"" {  } { { "jp4x4.vhd" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/jp4x4.vhd" 46 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_1hc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_1hc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_1hc " "Info: Found entity 1: mux_1hc" {  } { { "db/mux_1hc.tdf" "" { Text "D:/lecture/embed/FPGA/FPGAExample/jp4x4/db/mux_1hc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}