jp4x4.qsf

FPGA和VHDL的全过程和源码

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		jp4x4_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name TOP_LEVEL_ENTITY jp4x4_test
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:30:32  APRIL 11, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_INIT_DONE_OUTPUT OFF
set_location_assignment PIN_28 -to clk
set_location_assignment PIN_122 -to start
set_location_assignment PIN_3 -to kbcol[0]
set_location_assignment PIN_5 -to kbcol[1]
set_location_assignment PIN_7 -to kbcol[2]
set_location_assignment PIN_11 -to kbcol[3]
set_location_assignment PIN_13 -to kbrow[0]
set_location_assignment PIN_15 -to kbrow[1]
set_location_assignment PIN_17 -to kbrow[2]
set_location_assignment PIN_19 -to kbrow[3]
set_location_assignment PIN_160 -to scan[0]
set_location_assignment PIN_163 -to scan[1]
set_location_assignment PIN_162 -to scan[2]
set_location_assignment PIN_165 -to scan[3]
set_location_assignment PIN_161 -to seg7_out[0]
set_location_assignment PIN_159 -to seg7_out[1]
set_location_assignment PIN_144 -to seg7_out[2]
set_location_assignment PIN_141 -to seg7_out[3]
set_location_assignment PIN_140 -to seg7_out[4]
set_location_assignment PIN_158 -to seg7_out[5]
set_location_assignment PIN_156 -to seg7_out[6]
set_global_assignment -name VHDL_FILE lpm_counter0.vhd
set_global_assignment -name TCL_SCRIPT_FILE setup.tcl
set_global_assignment -name VHDL_FILE jp4x4.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE jp4x4.vwf
set_global_assignment -name BDF_FILE jp4x4_test.bdf
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"