idct.fit.summary

8x8 iDCT verilog code 一次輸入八個點

Fitter Status : Successful - Sun Jun 15 20:08:12 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : IDCT
Top-level Entity Name : IDCT
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 3,621 / 33,216 ( 11 % )
    Total combinational functions : 3,129 / 33,216 ( 9 % )
    Dedicated logic registers : 1,305 / 33,216 ( 4 % )
Total registers : 1305
Total pins : 467 / 475 ( 98 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )