keyboard1.tan.qmsg

数码管显示Vhdl实现

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clock_1k register delay_kbtingle:inst4\|scan_start register flip_latch:inst6\|data_out\[0\] 16.89 MHz 59.2 ns Internal " "Info: Clock \"clock_1k\" has Internal fmax of 16.89 MHz between source register \"delay_kbtingle:inst4\|scan_start\" and destination register \"flip_latch:inst6\|data_out\[0\]\" (period= 59.2 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "35.700 ns + Longest register register " "Info: + Longest register to register delay is 35.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns delay_kbtingle:inst4\|scan_start 1 REG LC82 69 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC82; Fanout = 69; REG Node = 'delay_kbtingle:inst4\|scan_start'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|scan_start } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 66 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(4.400 ns) 7.400 ns delay_kbtingle:inst4\|process0~96 2 COMB LC32 12 " "Info: 2: + IC(3.000 ns) + CELL(4.400 ns) = 7.400 ns; Loc. = LC32; Fanout = 12; COMB Node = 'delay_kbtingle:inst4\|process0~96'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "7.400 ns" { delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|process0~96 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(7.000 ns) 14.400 ns delay_kbtingle:inst4\|previous_row_data\[3\]~51 3 COMB LOOP LC81 51 " "Info: 3: + IC(0.000 ns) + CELL(7.000 ns) = 14.400 ns; Loc. = LC81; Fanout = 51; COMB LOOP Node = 'delay_kbtingle:inst4\|previous_row_data\[3\]~51'" { { "Info" "ITDB_PART_OF_SCC" "delay_kbtingle:inst4\|previous_row_data\[3\]~51 LC81 " "Info: Loc. = LC81; Node \"delay_kbtingle:inst4\|previous_row_data\[3\]~51\"" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|previous_row_data[3]~51 } "NODE_NAME" } "" } }  } 0 0 "Loc. = %2!s!; Node \"%1!s!\"" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|previous_row_data[3]~51 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 71 -1 0 } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "7.000 ns" { delay_kbtingle:inst4|process0~96 delay_kbtingle:inst4|previous_row_data[3]~51 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 71 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(4.400 ns) 21.800 ns delay_kbtingle:inst4\|process0~100 4 COMB LC29 24 " "Info: 4: + IC(3.000 ns) + CELL(4.400 ns) = 21.800 ns; Loc. = LC29; Fanout = 24; COMB Node = 'delay_kbtingle:inst4\|process0~100'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "7.400 ns" { delay_kbtingle:inst4|previous_row_data[3]~51 delay_kbtingle:inst4|process0~100 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(7.100 ns) 28.900 ns delay_kbtingle:inst4\|key_data\[2\]~86 5 COMB LOOP LC85 67 " "Info: 5: + IC(0.000 ns) + CELL(7.100 ns) = 28.900 ns; Loc. = LC85; Fanout = 67; COMB LOOP Node = 'delay_kbtingle:inst4\|key_data\[2\]~86'" { { "Info" "ITDB_PART_OF_SCC" "delay_kbtingle:inst4\|previous_row_data\[2\]~48 LC91 " "Info: Loc. = LC91; Node \"delay_kbtingle:inst4\|previous_row_data\[2\]~48\"" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|previous_row_data[2]~48 } "NODE_NAME" } "" } }  } 0 0 "Loc. = %2!s!; Node \"%1!s!\"" 0 0} { "Info" "ITDB_PART_OF_SCC" "delay_kbtingle:inst4\|key_data\[2\]~86 LC85 " "Info: Loc. = LC85; Node \"delay_kbtingle:inst4\|key_data\[2\]~86\"" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|key_data[2]~86 } "NODE_NAME" } "" } }  } 0 0 "Loc. = %2!s!; Node \"%1!s!\"" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|previous_row_data[2]~48 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 71 -1 0 } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { delay_kbtingle:inst4|key_data[2]~86 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 71 -1 0 } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "7.100 ns" { delay_kbtingle:inst4|process0~100 delay_kbtingle:inst4|key_data[2]~86 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 71 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.800 ns) + CELL(1.300 ns) 33.000 ns key_decode:inst5\|Mux~1355 6 COMB LC17 1 " "Info: 6: + IC(2.800 ns) + CELL(1.300 ns) = 33.000 ns; Loc. = LC17; Fanout = 1; COMB Node = 'key_decode:inst5\|Mux~1355'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "4.100 ns" { delay_kbtingle:inst4|key_data[2]~86 key_decode:inst5|Mux~1355 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.700 ns) 35.700 ns flip_latch:inst6\|data_out\[0\] 7 REG LC18 2 " "Info: 7: + IC(0.000 ns) + CELL(2.700 ns) = 35.700 ns; Loc. = LC18; Fanout = 2; REG Node = 'flip_latch:inst6\|data_out\[0\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "2.700 ns" { key_decode:inst5|Mux~1355 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "26.900 ns ( 75.35 % ) " "Info: Total cell delay = 26.900 ns ( 75.35 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.800 ns ( 24.65 % ) " "Info: Total interconnect delay = 8.800 ns ( 24.65 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "35.700 ns" { delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|process0~96 delay_kbtingle:inst4|previous_row_data[3]~51 delay_kbtingle:inst4|process0~100 delay_kbtingle:inst4|key_data[2]~86 key_decode:inst5|Mux~1355 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "35.700 ns" { delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|process0~96 delay_kbtingle:inst4|previous_row_data[3]~51 delay_kbtingle:inst4|process0~100 delay_kbtingle:inst4|key_data[2]~86 key_decode:inst5|Mux~1355 flip_latch:inst6|data_out[0] } { 0.000ns 3.000ns 0.000ns 3.000ns 0.000ns 2.800ns 0.000ns } { 0.000ns 4.400ns 7.000ns 4.400ns 7.100ns 1.300ns 2.700ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "10.600 ns - Smallest " "Info: - Smallest clock skew is 10.600 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock_1k destination 20.600 ns + Shortest register " "Info: + Shortest clock path from clock \"clock_1k\" to destination register is 20.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 2.500 ns clock_1k 1 CLK PIN_90 20 " "Info: 1: + IC(0.000 ns) + CELL(2.500 ns) = 2.500 ns; Loc. = PIN_90; Fanout = 20; CLK Node = 'clock_1k'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { clock_1k } "NODE_NAME" } "" } } { "keyboard1.bdf" "" { Schematic "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/keyboard1.bdf" { { -24 200 368 -8 "clock_1k" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 5.000 ns counter:inst1\|carrier 2 REG LC97 11 " "Info: 2: + IC(0.000 ns) + CELL(2.500 ns) = 5.000 ns; Loc. = LC97; Fanout = 11; REG Node = 'counter:inst1\|carrier'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "2.500 ns" { clock_1k counter:inst1|carrier } "NODE_NAME" } "" } } { "counter.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/counter.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.800 ns) + CELL(3.800 ns) 11.600 ns delay_kbtingle:inst4\|scan_start 3 REG LC82 69 " "Info: 3: + IC(2.800 ns) + CELL(3.800 ns) = 11.600 ns; Loc. = LC82; Fanout = 69; REG Node = 'delay_kbtingle:inst4\|scan_start'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "6.600 ns" { counter:inst1|carrier delay_kbtingle:inst4|scan_start } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 66 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(3.800 ns) 18.400 ns delay_kbtingle:inst4\|key_down~316 4 COMB SEXP23 8 " "Info: 4: + IC(3.000 ns) + CELL(3.800 ns) = 18.400 ns; Loc. = SEXP23; Fanout = 8; COMB Node = 'delay_kbtingle:inst4\|key_down~316'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "6.800 ns" { delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 47 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.200 ns) 20.600 ns flip_latch:inst6\|data_out\[0\] 5 REG LC18 2 " "Info: 5: + IC(0.000 ns) + CELL(2.200 ns) = 20.600 ns; Loc. = LC18; Fanout = 2; REG Node = 'flip_latch:inst6\|data_out\[0\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "2.200 ns" { delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "14.800 ns ( 71.84 % ) " "Info: Total cell delay = 14.800 ns ( 71.84 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.800 ns ( 28.16 % ) " "Info: Total interconnect delay = 5.800 ns ( 28.16 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "20.600 ns" { clock_1k counter:inst1|carrier delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "20.600 ns" { clock_1k clock_1k~out counter:inst1|carrier delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } { 0.000ns 0.000ns 0.000ns 2.800ns 3.000ns 0.000ns } { 0.000ns 2.500ns 2.500ns 3.800ns 3.800ns 2.200ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clock_1k source 10.000 ns - Longest register " "Info: - Longest clock path from clock \"clock_1k\" to source register is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 2.500 ns clock_1k 1 CLK PIN_90 20 " "Info: 1: + IC(0.000 ns) + CELL(2.500 ns) = 2.500 ns; Loc. = PIN_90; Fanout = 20; CLK Node = 'clock_1k'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { clock_1k } "NODE_NAME" } "" } } { "keyboard1.bdf" "" { Schematic "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/keyboard1.bdf" { { -24 200 368 -8 "clock_1k" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 5.000 ns counter:inst1\|carrier 2 REG LC97 11 " "Info: 2: + IC(0.000 ns) + CELL(2.500 ns) = 5.000 ns; Loc. = LC97; Fanout = 11; REG Node = 'counter:inst1\|carrier'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "2.500 ns" { clock_1k counter:inst1|carrier } "NODE_NAME" } "" } } { "counter.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/counter.vhd" 50 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.800 ns) + CELL(2.200 ns) 10.000 ns delay_kbtingle:inst4\|scan_start 3 REG LC82 69 " "Info: 3: + IC(2.800 ns) + CELL(2.200 ns) = 10.000 ns; Loc. = LC82; Fanout = 69; REG Node = 'delay_kbtingle:inst4\|scan_start'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "5.000 ns" { counter:inst1|carrier delay_kbtingle:inst4|scan_start } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 66 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.200 ns ( 72.00 % ) " "Info: Total cell delay = 7.200 ns ( 72.00 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.800 ns ( 28.00 % ) " "Info: Total interconnect delay = 2.800 ns ( 28.00 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "10.000 ns" { clock_1k counter:inst1|carrier delay_kbtingle:inst4|scan_start } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "10.000 ns" { clock_1k clock_1k~out counter:inst1|carrier delay_kbtingle:inst4|scan_start } { 0.000ns 0.000ns 0.000ns 2.800ns } { 0.000ns 2.500ns 2.500ns 2.200ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "20.600 ns" { clock_1k counter:inst1|carrier delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "20.600 ns" { clock_1k clock_1k~out counter:inst1|carrier delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } { 0.000ns 0.000ns 0.000ns 2.800ns 3.000ns 0.000ns } { 0.000ns 2.500ns 2.500ns 3.800ns 3.800ns 2.200ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "10.000 ns" { clock_1k counter:inst1|carrier delay_kbtingle:inst4|scan_start } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "10.000 ns" { clock_1k clock_1k~out counter:inst1|carrier delay_kbtingle:inst4|scan_start } { 0.000ns 0.000ns 0.000ns 2.800ns } { 0.000ns 2.500ns 2.500ns 2.200ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.600 ns + " "Info: + Micro clock to output delay of source is 1.600 ns" {  } { { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 66 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.900 ns + " "Info: + Micro setup delay of destination is 2.900 ns" {  } { { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" {  } { { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 66 -1 0 } } { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "35.700 ns" { delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|process0~96 delay_kbtingle:inst4|previous_row_data[3]~51 delay_kbtingle:inst4|process0~100 delay_kbtingle:inst4|key_data[2]~86 key_decode:inst5|Mux~1355 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "35.700 ns" { delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|process0~96 delay_kbtingle:inst4|previous_row_data[3]~51 delay_kbtingle:inst4|process0~100 delay_kbtingle:inst4|key_data[2]~86 key_decode:inst5|Mux~1355 flip_latch:inst6|data_out[0] } { 0.000ns 3.000ns 0.000ns 3.000ns 0.000ns 2.800ns 0.000ns } { 0.000ns 4.400ns 7.000ns 4.400ns 7.100ns 1.300ns 2.700ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "20.600 ns" { clock_1k counter:inst1|carrier delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "20.600 ns" { clock_1k clock_1k~out counter:inst1|carrier delay_kbtingle:inst4|scan_start delay_kbtingle:inst4|key_down~316 flip_latch:inst6|data_out[0] } { 0.000ns 0.000ns 0.000ns 2.800ns 3.000ns 0.000ns } { 0.000ns 2.500ns 2.500ns 3.800ns 3.800ns 2.200ns } } } { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "10.000 ns" { clock_1k counter:inst1|carrier delay_kbtingle:inst4|scan_start } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "10.000 ns" { clock_1k clock_1k~out counter:inst1|carrier delay_kbtingle:inst4|scan_start } { 0.000ns 0.000ns 0.000ns 2.800ns } { 0.000ns 2.500ns 2.500ns 2.200ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "row_data\[0\] register flip_latch:inst12\|data_out\[0\] register flip_latch:inst13\|data_out\[0\] 40.49 MHz 24.7 ns Internal " "Info: Clock \"row_data\[0\]\" has Internal fmax of 40.49 MHz between source register \"flip_latch:inst12\|data_out\[0\]\" and destination register \"flip_latch:inst13\|data_out\[0\]\" (period= 24.7 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.800 ns + Longest register register " "Info: + Longest register to register delay is 5.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns flip_latch:inst12\|data_out\[0\] 1 REG LC93 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC93; Fanout = 2; REG Node = 'flip_latch:inst12\|data_out\[0\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { flip_latch:inst12|data_out[0] } "NODE_NAME" } "" } } { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.700 ns) + CELL(3.100 ns) 5.800 ns flip_latch:inst13\|data_out\[0\] 2 REG LC95 1 " "Info: 2: + IC(2.700 ns) + CELL(3.100 ns) = 5.800 ns; Loc. = LC95; Fanout = 1; REG Node = 'flip_latch:inst13\|data_out\[0\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "5.800 ns" { flip_latch:inst12|data_out[0] flip_latch:inst13|data_out[0] } "NODE_NAME" } "" } } { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.100 ns ( 53.45 % ) " "Info: Total cell delay = 3.100 ns ( 53.45 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.700 ns ( 46.55 % ) " "Info: Total interconnect delay = 2.700 ns ( 46.55 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "5.800 ns" { flip_latch:inst12|data_out[0] flip_latch:inst13|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { flip_latch:inst12|data_out[0] flip_latch:inst13|data_out[0] } { 0.000ns 2.700ns } { 0.000ns 3.100ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-14.400 ns - Smallest " "Info: - Smallest clock skew is -14.400 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "row_data\[0\] destination 10.300 ns + Shortest register " "Info: + Shortest clock path from clock \"row_data\[0\]\" to destination register is 10.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.400 ns) 1.400 ns row_data\[0\] 1 CLK PIN_75 52 " "Info: 1: + IC(0.000 ns) + CELL(1.400 ns) = 1.400 ns; Loc. = PIN_75; Fanout = 52; CLK Node = 'row_data\[0\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "" { row_data[0] } "NODE_NAME" } "" } } { "keyboard1.bdf" "" { Schematic "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/keyboard1.bdf" { { 440 -96 72 456 "row_data\[3..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.900 ns) + CELL(3.800 ns) 8.100 ns delay_kbtingle:inst4\|key_down~474 2 COMB SEXP81 4 " "Info: 2: + IC(2.900 ns) + CELL(3.800 ns) = 8.100 ns; Loc. = SEXP81; Fanout = 4; COMB Node = 'delay_kbtingle:inst4\|key_down~474'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "6.700 ns" { row_data[0] delay_kbtingle:inst4|key_down~474 } "NODE_NAME" } "" } } { "delay_kbtingle.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/delay_kbtingle.vhd" 47 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.200 ns) 10.300 ns flip_latch:inst13\|data_out\[0\] 3 REG LC95 1 " "Info: 3: + IC(0.000 ns) + CELL(2.200 ns) = 10.300 ns; Loc. = LC95; Fanout = 1; REG Node = 'flip_latch:inst13\|data_out\[0\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "2.200 ns" { delay_kbtingle:inst4|key_down~474 flip_latch:inst13|data_out[0] } "NODE_NAME" } "" } } { "flip_latch.vhd" "" { Text "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/flip_latch.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.400 ns ( 71.84 % ) " "Info: Total cell delay = 7.400 ns ( 71.84 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.900 ns ( 28.16 % ) " "Info: Total interconnect delay = 2.900 ns ( 28.16 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keyboard1" "UNKNOWN" "V1" "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/db/keyboard1.quartus_db" { Floorplan "U:/02-开发板/CA328/03-源码文件/VHDL/05-键盘阵列-数码管显示/" "" "10.300 ns" { row_data[0] delay_kbtingle:inst4|key_down~474 flip_latch:inst13|data_out[0] } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus51/bin/Technology_Viewer.qrui" "10.300 ns" { row_data[0] row_data[0]~out delay_kbtingle:inst4|key_down~474 flip_latch:inst13|data_out[0] } { 0.000ns 0.000ns 2.900ns 0.000ns } { 0.000ns 1.400ns 3.800ns 2.200ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "row_data\[0\] source 24.700 ns - Longest register " "Info: - Longest clock path from clock \"row_data\[0\]\" to source register is 24.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.400 ns) 1.400 ns row_data\[0\] 1 CLK PIN_75 52 " "Info: 1: + IC(0.000 ns) + CELL(1.400 ns) = 1.400 ns; Loc. = PIN_75; Fanout = 52; CLK Node = 'row_data\[0\]'" {  } { { "f:/altera/quartus5