dds.tan.qmsg

基于DDS的数字移相正弦信号发生器设计

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" {  } { { "DDS.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/DDS.vhd" 9 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register REG1:U1\|Q\[7\] register ROM:U2\|OUTP\[4\] 76.34 MHz 13.1 ns Internal " "Info: Clock \"CLK\" has Internal fmax of 76.34 MHz between source register \"REG1:U1\|Q\[7\]\" and destination register \"ROM:U2\|OUTP\[4\]\" (period= 13.1 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.300 ns + Longest register register " "Info: + Longest register to register delay is 11.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns REG1:U1\|Q\[7\] 1 REG LC7_J42 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC7_J42; Fanout = 2; REG Node = 'REG1:U1\|Q\[7\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "" { REG1:U1|Q[7] } "NODE_NAME" } "" } } { "REG1.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/REG1.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.900 ns) 2.100 ns ROM:U2\|reduce_or~867 2 COMB LC8_J42 1 " "Info: 2: + IC(0.200 ns) + CELL(1.900 ns) = 2.100 ns; Loc. = LC8_J42; Fanout = 1; COMB Node = 'ROM:U2\|reduce_or~867'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "2.100 ns" { REG1:U1|Q[7] ROM:U2|reduce_or~867 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.700 ns) 4.000 ns ROM:U2\|reduce_or~868 3 COMB LC1_J42 5 " "Info: 3: + IC(0.200 ns) + CELL(1.700 ns) = 4.000 ns; Loc. = LC1_J42; Fanout = 5; COMB Node = 'ROM:U2\|reduce_or~868'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { ROM:U2|reduce_or~867 ROM:U2|reduce_or~868 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.100 ns) + CELL(1.700 ns) 6.800 ns ROM:U2\|reduce_or~895 4 COMB LC3_J43 1 " "Info: 4: + IC(1.100 ns) + CELL(1.700 ns) = 6.800 ns; Loc. = LC3_J43; Fanout = 1; COMB Node = 'ROM:U2\|reduce_or~895'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "2.800 ns" { ROM:U2|reduce_or~868 ROM:U2|reduce_or~895 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.200 ns) 8.200 ns ROM:U2\|reduce_or~929 5 COMB LC4_J43 1 " "Info: 5: + IC(0.200 ns) + CELL(1.200 ns) = 8.200 ns; Loc. = LC4_J43; Fanout = 1; COMB Node = 'ROM:U2\|reduce_or~929'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.400 ns" { ROM:U2|reduce_or~895 ROM:U2|reduce_or~929 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 10.100 ns ROM:U2\|reduce_or~900 6 COMB LC5_J43 1 " "Info: 6: + IC(0.000 ns) + CELL(1.900 ns) = 10.100 ns; Loc. = LC5_J43; Fanout = 1; COMB Node = 'ROM:U2\|reduce_or~900'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { ROM:U2|reduce_or~929 ROM:U2|reduce_or~900 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(1.000 ns) 11.300 ns ROM:U2\|OUTP\[4\] 7 REG LC1_J43 1 " "Info: 7: + IC(0.200 ns) + CELL(1.000 ns) = 11.300 ns; Loc. = LC1_J43; Fanout = 1; REG Node = 'ROM:U2\|OUTP\[4\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.200 ns" { ROM:U2|reduce_or~900 ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "ROM.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/ROM.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.400 ns 83.19 % " "Info: Total cell delay = 9.400 ns ( 83.19 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.900 ns 16.81 % " "Info: Total interconnect delay = 1.900 ns ( 16.81 % )" {  } {  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "11.300 ns" { REG1:U1|Q[7] ROM:U2|reduce_or~867 ROM:U2|reduce_or~868 ROM:U2|reduce_or~895 ROM:U2|reduce_or~929 ROM:U2|reduce_or~900 ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "11.300 ns" { REG1:U1|Q[7] ROM:U2|reduce_or~867 ROM:U2|reduce_or~868 ROM:U2|reduce_or~895 ROM:U2|reduce_or~929 ROM:U2|reduce_or~900 ROM:U2|OUTP[4] } { 0.000ns 0.200ns 0.200ns 1.100ns 0.200ns 0.000ns 0.200ns } { 0.000ns 1.900ns 1.700ns 1.700ns 1.200ns 1.900ns 1.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 1.900 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 1.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLK 1 CLK PIN_182 36 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_182; Fanout = 36; CLK Node = 'CLK'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "" { CLK } "NODE_NAME" } "" } } { "DDS.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/DDS.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(0.000 ns) 1.900 ns ROM:U2\|OUTP\[4\] 2 REG LC1_J43 1 " "Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC1_J43; Fanout = 1; REG Node = 'ROM:U2\|OUTP\[4\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.400 ns" { CLK ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "ROM.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/ROM.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.500 ns 26.32 % " "Info: Total cell delay = 0.500 ns ( 26.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns 73.68 % " "Info: Total interconnect delay = 1.400 ns ( 73.68 % )" {  } {  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out ROM:U2|OUTP[4] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 1.900 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 1.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLK 1 CLK PIN_182 36 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_182; Fanout = 36; CLK Node = 'CLK'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "" { CLK } "NODE_NAME" } "" } } { "DDS.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/DDS.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(0.000 ns) 1.900 ns REG1:U1\|Q\[7\] 2 REG LC7_J42 2 " "Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC7_J42; Fanout = 2; REG Node = 'REG1:U1\|Q\[7\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.400 ns" { CLK REG1:U1|Q[7] } "NODE_NAME" } "" } } { "REG1.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/REG1.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.500 ns 26.32 % " "Info: Total cell delay = 0.500 ns ( 26.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns 73.68 % " "Info: Total interconnect delay = 1.400 ns ( 73.68 % )" {  } {  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK REG1:U1|Q[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out REG1:U1|Q[7] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out ROM:U2|OUTP[4] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } } { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK REG1:U1|Q[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out REG1:U1|Q[7] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "REG1.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/REG1.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.700 ns + " "Info: + Micro setup delay of destination is 0.700 ns" {  } { { "ROM.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/ROM.vhd" 9 -1 0 } }  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "11.300 ns" { REG1:U1|Q[7] ROM:U2|reduce_or~867 ROM:U2|reduce_or~868 ROM:U2|reduce_or~895 ROM:U2|reduce_or~929 ROM:U2|reduce_or~900 ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "11.300 ns" { REG1:U1|Q[7] ROM:U2|reduce_or~867 ROM:U2|reduce_or~868 ROM:U2|reduce_or~895 ROM:U2|reduce_or~929 ROM:U2|reduce_or~900 ROM:U2|OUTP[4] } { 0.000ns 0.200ns 0.200ns 1.100ns 0.200ns 0.000ns 0.200ns } { 0.000ns 1.900ns 1.700ns 1.700ns 1.200ns 1.900ns 1.000ns } } } { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK ROM:U2|OUTP[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out ROM:U2|OUTP[4] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } } { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK REG1:U1|Q[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out REG1:U1|Q[7] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "SUM99:U0\|TEMP\[7\] K\[2\] CLK 14.800 ns register " "Info: tsu for register \"SUM99:U0\|TEMP\[7\]\" (data pin = \"K\[2\]\", clock pin = \"CLK\") is 14.800 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "16.000 ns + Longest pin register " "Info: + Longest pin to register delay is 16.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.400 ns) 3.400 ns K\[2\] 1 PIN PIN_113 2 " "Info: 1: + IC(0.000 ns) + CELL(3.400 ns) = 3.400 ns; Loc. = PIN_113; Fanout = 2; PIN Node = 'K\[2\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "" { K[2] } "NODE_NAME" } "" } } { "DDS.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/DDS.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.400 ns) + CELL(0.700 ns) 10.500 ns SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\] 2 COMB LC6_J20 2 " "Info: 2: + IC(6.400 ns) + CELL(0.700 ns) = 10.500 ns; Loc. = LC6_J20; Fanout = 2; COMB Node = 'SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "7.100 ns" { K[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 10.700 ns SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\] 3 COMB LC7_J20 2 " "Info: 3: + IC(0.000 ns) + CELL(0.200 ns) = 10.700 ns; Loc. = LC7_J20; Fanout = 2; COMB Node = 'SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "0.200 ns" { SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 10.900 ns SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\] 4 COMB LC8_J20 2 " "Info: 4: + IC(0.000 ns) + CELL(0.200 ns) = 10.900 ns; Loc. = LC8_J20; Fanout = 2; COMB Node = 'SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "0.200 ns" { SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(0.200 ns) 12.000 ns SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[5\] 5 COMB LC1_J22 2 " "Info: 5: + IC(0.900 ns) + CELL(0.200 ns) = 12.000 ns; Loc. = LC1_J22; Fanout = 2; COMB Node = 'SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[5\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.100 ns" { SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.200 ns) 12.200 ns SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[6\] 6 COMB LC2_J22 2 " "Info: 6: + IC(0.000 ns) + CELL(0.200 ns) = 12.200 ns; Loc. = LC2_J22; Fanout = 2; COMB Node = 'SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cout\[6\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "0.200 ns" { SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.600 ns) 13.800 ns SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[7\] 7 COMB LC3_J22 1 " "Info: 7: + IC(0.000 ns) + CELL(1.600 ns) = 13.800 ns; Loc. = LC3_J22; Fanout = 1; COMB Node = 'SUM99:U0\|lpm_add_sub:add_rtl_0\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[7\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.600 ns" { SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(1.000 ns) 16.000 ns SUM99:U0\|TEMP\[7\] 8 REG LC5_J25 3 " "Info: 8: + IC(1.200 ns) + CELL(1.000 ns) = 16.000 ns; Loc. = LC5_J25; Fanout = 3; REG Node = 'SUM99:U0\|TEMP\[7\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "2.200 ns" { SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] SUM99:U0|TEMP[7] } "NODE_NAME" } "" } } { "SUM99.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/SUM99.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.500 ns 46.88 % " "Info: Total cell delay = 7.500 ns ( 46.88 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.500 ns 53.13 % " "Info: Total interconnect delay = 8.500 ns ( 53.13 % )" {  } {  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "16.000 ns" { K[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] SUM99:U0|TEMP[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "16.000 ns" { K[2] K[2]~out SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] SUM99:U0|TEMP[7] } { 0.000ns 0.000ns 6.400ns 0.000ns 0.000ns 0.900ns 0.000ns 0.000ns 1.200ns } { 0.000ns 3.400ns 0.700ns 0.200ns 0.200ns 0.200ns 0.200ns 1.600ns 1.000ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.700 ns + " "Info: + Micro setup delay of destination is 0.700 ns" {  } { { "SUM99.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/SUM99.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 1.900 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK\" to destination register is 1.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns CLK 1 CLK PIN_182 36 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_182; Fanout = 36; CLK Node = 'CLK'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "" { CLK } "NODE_NAME" } "" } } { "DDS.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/DDS.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(0.000 ns) 1.900 ns SUM99:U0\|TEMP\[7\] 2 REG LC5_J25 3 " "Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC5_J25; Fanout = 3; REG Node = 'SUM99:U0\|TEMP\[7\]'" {  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.400 ns" { CLK SUM99:U0|TEMP[7] } "NODE_NAME" } "" } } { "SUM99.vhd" "" { Text "C:/Documents and Settings/gdufs/桌面/DDS做/SUM99.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.500 ns 26.32 % " "Info: Total cell delay = 0.500 ns ( 26.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.400 ns 73.68 % " "Info: Total interconnect delay = 1.400 ns ( 73.68 % )" {  } {  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK SUM99:U0|TEMP[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out SUM99:U0|TEMP[7] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0}  } { { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "16.000 ns" { K[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] SUM99:U0|TEMP[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "16.000 ns" { K[2] K[2]~out SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] SUM99:U0|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] SUM99:U0|TEMP[7] } { 0.000ns 0.000ns 6.400ns 0.000ns 0.000ns 0.900ns 0.000ns 0.000ns 1.200ns } { 0.000ns 3.400ns 0.700ns 0.200ns 0.200ns 0.200ns 0.200ns 1.600ns 1.000ns } } } { "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" "" { Report "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds_cmp.qrpt" Compiler "dds" "UNKNOWN" "V1" "C:/Documents and Settings/gdufs/桌面/DDS做/db/dds.quartus_db" { Floorplan "C:/Documents and Settings/gdufs/桌面/DDS做/" "" "1.900 ns" { CLK SUM99:U0|TEMP[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "1.900 ns" { CLK CLK~out SUM99:U0|TEMP[7] } { 0.000ns 0.000ns 1.400ns } { 0.000ns 0.500ns 0.000ns } } }  } 0}