dds.fit.summary

来自「基于DDS的数字移相正弦信号发生器设计」· SUMMARY 代码 · 共 13 行

Flow Status : Successful - Thu Jun 19 16:27:34 2008
Quartus II Version : 5.0 Build 168 06/22/2005 SP 1 SJ Full Version
Revision Name : dds
Top-level Entity Name : DDS
Family : ACEX1K
Device : EP1K100QC208-3
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 75 / 4,992 ( 1 % )
Total pins : 22 / 147 ( 14 % )
Total memory bits : 0 / 49,152 ( 0 % )
Total PLLs : 0