piso4.fit.rpt

大量VHDL写的数字系统设计有用实例达到

+-------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                       ;
+-------------------------------------------------+-----------------------------+
; Number of Signals Sourced Out  (Average = 1.00) ; Number of LABs  (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 0                           ;
; 1                                               ; 1                           ;
+-------------------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Distinct Inputs                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Distinct Inputs  (Average = 6.00) ; Number of LABs  (Total = 1) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 0                           ;
; 3                                           ; 0                           ;
; 4                                           ; 0                           ;
; 5                                           ; 0                           ;
; 6                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-------------------------------------------------------------------------+
; Fitter Device Options                                                   ;
+----------------------------------------------+--------------------------+
; Option                                       ; Setting                  ;
+----------------------------------------------+--------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                      ;
; Enable device-wide reset (DEV_CLRn)          ; Off                      ;
; Enable device-wide output enable (DEV_OE)    ; Off                      ;
; Enable INIT_DONE output                      ; Off                      ;
; Configuration scheme                         ; Active Serial            ;
; Error detection CRC                          ; Off                      ;
; nCEO                                         ; As output driving ground ;
; Reserve all unused pins                      ; As output driving ground ;
; Base pin-out file on sameframe device        ; Off                      ;
+----------------------------------------------+--------------------------+


+----------------------------+
; Advanced Data - General    ;
+--------------------+-------+
; Name               ; Value ;
+--------------------+-------+
; Status Code        ; 0     ;
; Desired User Slack ; 0     ;
; Fit Attempts       ; 1     ;
+--------------------+-------+


+----------------------------------------------------------------------------+
; Advanced Data - Placement Preparation                                      ;
+------------------------------------------------------------------+---------+
; Name                                                             ; Value   ;
+------------------------------------------------------------------+---------+
; Auto Fit Point 1 - Fit Attempt 1                                 ; ff      ;
; Mid Wire Use - Fit Attempt 1                                     ; 0       ;
; Mid Slack - Fit Attempt 1                                        ; -3655   ;
; Internal Atom Count - Fit Attempt 1                              ; 13      ;
; LE/ALM Count - Fit Attempt 1                                     ; 7       ;
; LAB Count - Fit Attempt 1                                        ; 2       ;
; Outputs per Lab - Fit Attempt 1                                  ; 0.500   ;
; Inputs per LAB - Fit Attempt 1                                   ; 2.000   ;
; Global Inputs per LAB - Fit Attempt 1                            ; 1.000   ;
; LAB Constraint 'non-global clock + sync load' - Fit Attempt 1    ; 0:2     ;
; LAB Constraint 'non-global controls' - Fit Attempt 1             ; 0:2     ;
; LAB Constraint 'non-global + aclr' - Fit Attempt 1               ; 0:1;1:1 ;
; LAB Constraint 'global non-clock non-aclr' - Fit Attempt 1       ; 0:2     ;
; LAB Constraint 'global controls' - Fit Attempt 1                 ; 0:1;2:1 ;
; LAB Constraint 'deterministic LABSMUXA/LABXMUXB' - Fit Attempt 1 ; 0:2     ;
; LAB Constraint 'deterministic LABSMUXC/LABXMUXD' - Fit Attempt 1 ; 0:2     ;
; LAB Constraint 'clock / ce pair constraint' - Fit Attempt 1      ; 0:1;1:1 ;
; LAB Constraint 'aclr constraint' - Fit Attempt 1                 ; 0:1;2:1 ;
; LAB Constraint 'true sload_sclear pair' - Fit Attempt 1          ; 0:2     ;
; LAB Constraint 'constant sload_sclear pair' - Fit Attempt 1      ; 0:2     ;
; LAB Constraint 'has placement constraint' - Fit Attempt 1        ; 0:2     ;
; LEs in Chains - Fit Attempt 1                                    ; 0       ;
; LEs in Long Chains - Fit Attempt 1                               ; 0       ;
; LABs with Chains - Fit Attempt 1                                 ; 0       ;
; LABs with Multiple Chains - Fit Attempt 1                        ; 0       ;
; Time - Fit Attempt 1                                             ; 0       ;
+------------------------------------------------------------------+---------+


+---------------------------------------------+
; Advanced Data - Placement                   ;
+-------------------------------------+-------+
; Name                                ; Value ;
+-------------------------------------+-------+
; Auto Fit Point 2 - Fit Attempt 1    ; ff    ;
; Early Wire Use - Fit Attempt 1      ; 0     ;
; Early Slack - Fit Attempt 1         ; -1502 ;
; Auto Fit Point 3 - Fit Attempt 1    ; ff    ;
; Auto Fit Point 4 - Fit Attempt 1    ; ff    ;
; Mid Wire Use - Fit Attempt 1        ; 0     ;
; Mid Slack - Fit Attempt 1           ; -1502 ;
; Late Wire Use - Fit Attempt 1       ; 0     ;
; Late Slack - Fit Attempt 1          ; -1502 ;
; Peak Regional Wire - Fit Attempt 1  ; 0.000 ;
; Auto Fit Point 5 - Fit Attempt 1    ; ff    ;
; Time - Fit Attempt 1                ; 0     ;
; Time in tsm_tan.dll - Fit Attempt 1 ; 0.016 ;
+-------------------------------------+-------+


+---------------------------------------------+
; Advanced Data - Routing                     ;
+-------------------------------------+-------+
; Name                                ; Value ;
+-------------------------------------+-------+
; Early Wire Use - Fit Attempt 1      ; 0     ;
; Peak Regional Wire - Fit Attempt 1  ; 0     ;
; Early Slack - Fit Attempt 1         ; -310  ;
; Mid Slack - Fit Attempt 1           ; -770  ;
; Late Slack - Fit Attempt 1          ; -770  ;
; Late Wire Use - Fit Attempt 1       ; 0     ;
; Time - Fit Attempt 1                ; 0     ;
; Time in tsm_tan.dll - Fit Attempt 1 ; 0.031 ;
+-------------------------------------+-------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Fri Jun 01 11:14:17 2007
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off piso4 -c piso4
Info: Selected device EP2C8T144C8 for design "piso4"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Fitter is using the Classic Timing Analyzer
Info: Timing requirements not specified -- quality metrics such as performance and power consumption may