📄 state_machine.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--state.state1 is state.state1
--operation mode is normal
state.state1_lut_out = !state.state0;
state.state1 = DFFEAS(state.state1_lut_out, clk, rst, , A1L07, , , , );
--state.state7 is state.state7
--operation mode is normal
state.state7_lut_out = state.state6;
state.state7 = DFFEAS(state.state7_lut_out, clk, rst, , A1L07, , , , );
--state.state0 is state.state0
--operation mode is normal
state.state0_lut_out = !state.state7;
state.state0 = DFFEAS(state.state0_lut_out, clk, rst, , A1L07, , , , );
--A1L08 is reduce_or~3
--operation mode is normal
A1L08 = state.state1 # state.state7 # !state.state0;
--state.state6 is state.state6
--operation mode is normal
state.state6_lut_out = state.state5;
state.state6 = DFFEAS(state.state6_lut_out, clk, rst, , A1L07, , , , );
--state.state5 is state.state5
--operation mode is normal
state.state5_lut_out = state.state4;
state.state5 = DFFEAS(state.state5_lut_out, clk, rst, , A1L07, , , , );
--state.state4 is state.state4
--operation mode is normal
state.state4_lut_out = state.state3;
state.state4 = DFFEAS(state.state4_lut_out, clk, rst, , A1L07, , , , );
--A1L18 is reduce_or~17
--operation mode is normal
A1L18 = state.state6 # state.state5 # state.state4 # !state.state0;
--state.state2 is state.state2
--operation mode is normal
state.state2_lut_out = state.state1;
state.state2 = DFFEAS(state.state2_lut_out, clk, rst, , A1L07, , , , );
--A1L97 is reduce_or~1
--operation mode is normal
A1L97 = state.state6 # state.state2 # !state.state0;
--A1L87 is reduce_or~0
--operation mode is normal
A1L87 = state.state1 # state.state7 # state.state4;
--A1L95 is c~8
--operation mode is normal
A1L95 = !state.state6 & !state.state5;
--A1L06 is c~9
--operation mode is normal
A1L06 = !state.state1 & !state.state4;
--cnt[0] is cnt[0]
--operation mode is arithmetic
cnt[0]_lut_out = !cnt[0];
cnt[0] = DFFEAS(cnt[0]_lut_out, clk, rst, , , , , , );
--A1L31 is cnt[0]~337
--operation mode is arithmetic
A1L31 = CARRY(cnt[0]);
--cnt[1] is cnt[1]
--operation mode is arithmetic
cnt[1]_carry_eqn = A1L31;
cnt[1]_lut_out = cnt[1] $ (cnt[1]_carry_eqn);
cnt[1] = DFFEAS(cnt[1]_lut_out, clk, rst, , , , , , );
--A1L51 is cnt[1]~341
--operation mode is arithmetic
A1L51 = CARRY(!A1L31 # !cnt[1]);
--cnt[2] is cnt[2]
--operation mode is arithmetic
cnt[2]_carry_eqn = A1L51;
cnt[2]_lut_out = cnt[2] $ (!cnt[2]_carry_eqn);
cnt[2] = DFFEAS(cnt[2]_lut_out, clk, rst, , , , , , );
--A1L71 is cnt[2]~345
--operation mode is arithmetic
A1L71 = CARRY(cnt[2] & (!A1L51));
--cnt[3] is cnt[3]
--operation mode is arithmetic
cnt[3]_carry_eqn = A1L71;
cnt[3]_lut_out = cnt[3] $ (cnt[3]_carry_eqn);
cnt[3] = DFFEAS(cnt[3]_lut_out, clk, rst, , , , , , );
--A1L91 is cnt[3]~349
--operation mode is arithmetic
A1L91 = CARRY(!A1L71 # !cnt[3]);
--A1L17 is reduce_nor~184
--operation mode is normal
A1L17 = !cnt[3] # !cnt[2] # !cnt[1] # !cnt[0];
--cnt[4] is cnt[4]
--operation mode is arithmetic
cnt[4]_carry_eqn = A1L91;
cnt[4]_lut_out = cnt[4] $ (!cnt[4]_carry_eqn);
cnt[4] = DFFEAS(cnt[4]_lut_out, clk, rst, , , , , , );
--A1L12 is cnt[4]~353
--operation mode is arithmetic
A1L12 = CARRY(cnt[4] & (!A1L91));
--cnt[5] is cnt[5]
--operation mode is arithmetic
cnt[5]_carry_eqn = A1L12;
cnt[5]_lut_out = cnt[5] $ (cnt[5]_carry_eqn);
cnt[5] = DFFEAS(cnt[5]_lut_out, clk, rst, , , , , , );
--A1L32 is cnt[5]~357
--operation mode is arithmetic
A1L32 = CARRY(!A1L12 # !cnt[5]);
--cnt[6] is cnt[6]
--operation mode is arithmetic
cnt[6]_carry_eqn = A1L32;
cnt[6]_lut_out = cnt[6] $ (!cnt[6]_carry_eqn);
cnt[6] = DFFEAS(cnt[6]_lut_out, clk, rst, , , , , , );
--A1L52 is cnt[6]~361
--operation mode is arithmetic
A1L52 = CARRY(cnt[6] & (!A1L32));
--cnt[7] is cnt[7]
--operation mode is arithmetic
cnt[7]_carry_eqn = A1L52;
cnt[7]_lut_out = cnt[7] $ (cnt[7]_carry_eqn);
cnt[7] = DFFEAS(cnt[7]_lut_out, clk, rst, , , , , , );
--A1L72 is cnt[7]~365
--operation mode is arithmetic
A1L72 = CARRY(!A1L52 # !cnt[7]);
--A1L27 is reduce_nor~185
--operation mode is normal
A1L27 = !cnt[7] # !cnt[6] # !cnt[5] # !cnt[4];
--cnt[8] is cnt[8]
--operation mode is arithmetic
cnt[8]_carry_eqn = A1L72;
cnt[8]_lut_out = cnt[8] $ (!cnt[8]_carry_eqn);
cnt[8] = DFFEAS(cnt[8]_lut_out, clk, rst, , , , , , );
--A1L92 is cnt[8]~369
--operation mode is arithmetic
A1L92 = CARRY(cnt[8] & (!A1L72));
--cnt[9] is cnt[9]
--operation mode is arithmetic
cnt[9]_carry_eqn = A1L92;
cnt[9]_lut_out = cnt[9] $ (cnt[9]_carry_eqn);
cnt[9] = DFFEAS(cnt[9]_lut_out, clk, rst, , , , , , );
--A1L13 is cnt[9]~373
--operation mode is arithmetic
A1L13 = CARRY(!A1L92 # !cnt[9]);
--cnt[10] is cnt[10]
--operation mode is arithmetic
cnt[10]_carry_eqn = A1L13;
cnt[10]_lut_out = cnt[10] $ (!cnt[10]_carry_eqn);
cnt[10] = DFFEAS(cnt[10]_lut_out, clk, rst, , , , , , );
--A1L33 is cnt[10]~377
--operation mode is arithmetic
A1L33 = CARRY(cnt[10] & (!A1L13));
--cnt[11] is cnt[11]
--operation mode is arithmetic
cnt[11]_carry_eqn = A1L33;
cnt[11]_lut_out = cnt[11] $ (cnt[11]_carry_eqn);
cnt[11] = DFFEAS(cnt[11]_lut_out, clk, rst, , , , , , );
--A1L53 is cnt[11]~381
--operation mode is arithmetic
A1L53 = CARRY(!A1L33 # !cnt[11]);
--A1L37 is reduce_nor~186
--operation mode is normal
A1L37 = !cnt[11] # !cnt[10] # !cnt[9] # !cnt[8];
--cnt[12] is cnt[12]
--operation mode is arithmetic
cnt[12]_carry_eqn = A1L53;
cnt[12]_lut_out = cnt[12] $ (!cnt[12]_carry_eqn);
cnt[12] = DFFEAS(cnt[12]_lut_out, clk, rst, , , , , , );
--A1L73 is cnt[12]~385
--operation mode is arithmetic
A1L73 = CARRY(cnt[12] & (!A1L53));
--cnt[13] is cnt[13]
--operation mode is arithmetic
cnt[13]_carry_eqn = A1L73;
cnt[13]_lut_out = cnt[13] $ (cnt[13]_carry_eqn);
cnt[13] = DFFEAS(cnt[13]_lut_out, clk, rst, , , , , , );
--A1L93 is cnt[13]~389
--operation mode is arithmetic
A1L93 = CARRY(!A1L73 # !cnt[13]);
--cnt[14] is cnt[14]
--operation mode is arithmetic
cnt[14]_carry_eqn = A1L93;
cnt[14]_lut_out = cnt[14] $ (!cnt[14]_carry_eqn);
cnt[14] = DFFEAS(cnt[14]_lut_out, clk, rst, , , , , , );
--A1L14 is cnt[14]~393
--operation mode is arithmetic
A1L14 = CARRY(cnt[14] & (!A1L93));
--cnt[15] is cnt[15]
--operation mode is arithmetic
cnt[15]_carry_eqn = A1L14;
cnt[15]_lut_out = cnt[15] $ (cnt[15]_carry_eqn);
cnt[15] = DFFEAS(cnt[15]_lut_out, clk, rst, , , , , , );
--A1L34 is cnt[15]~397
--operation mode is arithmetic
A1L34 = CARRY(!A1L14 # !cnt[15]);
--A1L47 is reduce_nor~187
--operation mode is normal
A1L47 = !cnt[15] # !cnt[14] # !cnt[13] # !cnt[12];
--A1L57 is reduce_nor~188
--operation mode is normal
A1L57 = A1L17 # A1L27 # A1L37 # A1L47;
--cnt[16] is cnt[16]
--operation mode is arithmetic
cnt[16]_carry_eqn = A1L34;
cnt[16]_lut_out = cnt[16] $ (!cnt[16]_carry_eqn);
cnt[16] = DFFEAS(cnt[16]_lut_out, clk, rst, , , , , , );
--A1L54 is cnt[16]~401
--operation mode is arithmetic
A1L54 = CARRY(cnt[16] & (!A1L34));
--cnt[17] is cnt[17]
--operation mode is arithmetic
cnt[17]_carry_eqn = A1L54;
cnt[17]_lut_out = cnt[17] $ (cnt[17]_carry_eqn);
cnt[17] = DFFEAS(cnt[17]_lut_out, clk, rst, , , , , , );
--A1L74 is cnt[17]~405
--operation mode is arithmetic
A1L74 = CARRY(!A1L54 # !cnt[17]);
--cnt[18] is cnt[18]
--operation mode is arithmetic
cnt[18]_carry_eqn = A1L74;
cnt[18]_lut_out = cnt[18] $ (!cnt[18]_carry_eqn);
cnt[18] = DFFEAS(cnt[18]_lut_out, clk, rst, , , , , , );
--A1L94 is cnt[18]~409
--operation mode is arithmetic
A1L94 = CARRY(cnt[18] & (!A1L74));
--cnt[19] is cnt[19]
--operation mode is arithmetic
cnt[19]_carry_eqn = A1L94;
cnt[19]_lut_out = cnt[19] $ (cnt[19]_carry_eqn);
cnt[19] = DFFEAS(cnt[19]_lut_out, clk, rst, , , , , , );
--A1L15 is cnt[19]~413
--operation mode is arithmetic
A1L15 = CARRY(!A1L94 # !cnt[19]);
--A1L67 is reduce_nor~189
--operation mode is normal
A1L67 = !cnt[19] # !cnt[18] # !cnt[17] # !cnt[16];
--cnt[20] is cnt[20]
--operation mode is arithmetic
cnt[20]_carry_eqn = A1L15;
cnt[20]_lut_out = cnt[20] $ (!cnt[20]_carry_eqn);
cnt[20] = DFFEAS(cnt[20]_lut_out, clk, rst, , , , , , );
--A1L35 is cnt[20]~417
--operation mode is arithmetic
A1L35 = CARRY(cnt[20] & (!A1L15));
--cnt[21] is cnt[21]
--operation mode is arithmetic
cnt[21]_carry_eqn = A1L35;
cnt[21]_lut_out = cnt[21] $ (cnt[21]_carry_eqn);
cnt[21] = DFFEAS(cnt[21]_lut_out, clk, rst, , , , , , );
--A1L55 is cnt[21]~421
--operation mode is arithmetic
A1L55 = CARRY(!A1L35 # !cnt[21]);
--cnt[22] is cnt[22]
--operation mode is arithmetic
cnt[22]_carry_eqn = A1L55;
cnt[22]_lut_out = cnt[22] $ (!cnt[22]_carry_eqn);
cnt[22] = DFFEAS(cnt[22]_lut_out, clk, rst, , , , , , );
--A1L75 is cnt[22]~425
--operation mode is arithmetic
A1L75 = CARRY(cnt[22] & (!A1L55));
--cnt[23] is cnt[23]
--operation mode is normal
cnt[23]_carry_eqn = A1L75;
cnt[23]_lut_out = cnt[23] $ (cnt[23]_carry_eqn);
cnt[23] = DFFEAS(cnt[23]_lut_out, clk, rst, , , , , , );
--A1L77 is reduce_nor~190
--operation mode is normal
A1L77 = !cnt[23] # !cnt[22] # !cnt[21] # !cnt[20];
--A1L07 is reduce_nor~0
--operation mode is normal
A1L07 = !A1L57 & !A1L67 & !A1L77;
--state.state3 is state.state3
--operation mode is normal
state.state3_lut_out = state.state2;
state.state3 = DFFEAS(state.state3_lut_out, clk, rst, , A1L07, , , , );
--clk is clk
--operation mode is input
clk = INPUT();
--rst is rst
--operation mode is input
rst = INPUT();
--c[0] is c[0]
--operation mode is output
c[0] = OUTPUT(VCC);
--c[1] is c[1]
--operation mode is output
c[1] = OUTPUT(A1L08);
--c[2] is c[2]
--operation mode is output
c[2] = OUTPUT(!A1L18);
--c[3] is c[3]
--operation mode is output
c[3] = OUTPUT(!A1L97);
--c[4] is c[4]
--operation mode is output
c[4] = OUTPUT(A1L87);
--c[5] is c[5]
--operation mode is output
c[5] = OUTPUT(state.state2);
--c[6] is c[6]
--operation mode is output
c[6] = OUTPUT(!A1L95);
--c[7] is c[7]
--operation mode is output
c[7] = OUTPUT(!A1L06);
--en[0] is en[0]
--operation mode is output
en[0] = OUTPUT(GND);
--en[1] is en[1]
--operation mode is output
en[1] = OUTPUT(VCC);
--en[2] is en[2]
--operation mode is output
en[2] = OUTPUT(VCC);
--en[3] is en[3]
--operation mode is output
en[3] = OUTPUT(VCC);
--en[4] is en[4]
--operation mode is output
en[4] = OUTPUT(VCC);
--en[5] is en[5]
--operation mode is output
en[5] = OUTPUT(VCC);
--en[6] is en[6]
--operation mode is output
en[6] = OUTPUT(VCC);
--en[7] is en[7]
--operation mode is output
en[7] = OUTPUT(VCC);
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