count60.vhd

1．6个数码管静态显示驱动 2．按键模式选择(时分秒)与调整控制 3．用硬件描述语言(或混合原理图)设计时、分、秒计数器模块、按键控制状态机模块、显示译码模块、顶层模块。要求使用实验箱右下角的6个

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY count60 IS
PORT ( 	clk ,en: IN STD_LOGIC;
		cout: 	OUT STD_LOGIC;
		hh,hl: 	OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END count60;

ARCHITECTURE arc OF count60 IS 
SIGNAL yh,yl: STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
hh <= yh;
hl <= yl;
PROCESS(clk)
BEGIN
IF(clk'EVENT) AND (clk = '1') THEN
	IF(en='1') THEN
      IF(yh="0101")AND(yl="1001") THEN
       yh<="0000";
       yl<="0000";
      ELSIF(yl="1001") THEN
       yh<=yh+1;
       yl<="0000";
      ELSE
        yl<=yl+1;
   END IF;
END IF;
END IF;
END PROCESS;
cout<='1' WHEN (yh="0101")AND(yl="1001") 
ELSE '0';
END arc;