top.vhd

1．6个数码管动态扫描显示驱动 2．按键模式选择(时分秒)与调整控制 3．用硬件描述语言(或混合原理图)设计时、分、秒计数器模块、按键控制状态机模块、动态扫描显示驱动模块、顶层模块。要求有闹钟定闹

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY top IS
PORT(mode,adjust,clk1,clks,clka,en,reset:IN STD_LOGIC;
     fout:OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
     ss:OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
     aout:OUT STD_LOGIC);
END top;

ARCHITECTURE arc OF top IS
COMPONENT seg4_7
PORT(data:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
     q:OUT STD_LOGIC_VECTOR(6 DOWNTO 0));
END COMPONENT;

COMPONENT cnt24
PORT(en,clk: IN STD_LOGIC;
      qh,ql:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END COMPONENT;

COMPONENT cout60
PORT(en,clk: IN STD_LOGIC;
      qh,ql:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
     cout:OUT STD_LOGIC );
END COMPONENT;

COMPONENT mode_adjust
PORT(mode,adjust,clk1,reset:IN STD_LOGIC;
     enh,enm,ens,hcl,mcl,scl,ahc,amc:OUT STD_LOGIC;
     modes:OUT STD_LOGIC_VECTOR(2 DOWNTO 0));
END COMPONENT;

COMPONENT scan
PORT(clk:IN STD_LOGIC;
     d:OUT STD_LOGIC_VECTOR(2 DOWNTO 0));
END COMPONENT;

COMPONENT muxcmp
PORT(HH,HL,MH,ML,SH,SL,AHH,AHL,AMH,AML:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
      s,modes:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
      clk:IN STD_LOGIC;
      muxout:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
      alarm:OUT STD_LOGIC);
END COMPONENT;

SIGNAL hh,hl,mh,ml,sh,sl,ahh,ahl,amh,aml:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL enh,enm,ens,hcl,mcl,scl,ahc,amc:STD_LOGIC;
SIGNAL cinh,cinm,cins,coutm,couts:STD_LOGIC;
SIGNAL s,m:STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL muxout:STD_LOGIC_VECTOR(3 DOWNTO 0);

BEGIN
  ss<=s;
  cinh<=(coutm AND couts) OR enh;
  cinm<=couts OR enm;
  cins<=ens OR en;
  control:mode_adjust PORT MAP(mode,adjust,clk1,reset,enh,enm,ens,hcl,mcl,scl,ahc,amc,m);
  hourc:cnt24 PORT MAP(cinh,hcl,hh,hl);
  minc:cout60 PORT MAP(cinm,mcl,mh,ml,coutm);
  secc:cout60 PORT MAP(cins,scl,sh,sl,couts);
  ahour:cnt24 PORT MAP(en,ahc,ahh,ahl);
  amin:cout60 PORT MAP(en,amc,amh,aml);
  deco:seg4_7 PORT MAP(muxout,fout(6 DOWNTO 0));
  scaner:scan PORT MAP(clks,s);
  muxcomp:muxcmp PORT MAP(hh,hl,mh,ml,sh,sl,ahh,ahl,amh,aml,s,m,clka,muxout,aout);
END arc;