i2c.vo

IIc总线的源代码（vhdl语言）

	.devpor(devpor),
	.combout(\uC_CTRL|next_state.addr~13 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|next_state.addr~13_I .operation_mode = "normal";
defparam \uC_CTRL|next_state.addr~13_I .packed_mode = "false";
defparam \uC_CTRL|next_state.addr~13_I .lut_mask = "00C0";
defparam \uC_CTRL|next_state.addr~13_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC6_16_H2
apex20ke_lcell \uC_CTRL|prs_state.addr~I (
// Equation(s):
// \uC_CTRL|prs_state.addr  = DFFE(\uC_CTRL|next_state.addr~13  # !\uC_CTRL|prs_state.idle  & !\as~combout  & !\uC_CTRL|as_int_d1 , GLOBAL(\clk~combout ), GLOBAL(\reset~combout ), , )

	.dataa(\uC_CTRL|prs_state.idle ),
	.datab(\as~combout ),
	.datac(\uC_CTRL|as_int_d1 ),
	.datad(\uC_CTRL|next_state.addr~13 ),
	.cin(gnd),
	.cascin(vcc),
	.clk(\clk~combout ),
	.aclr(!\reset~combout ),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\uC_CTRL|prs_state.addr ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|prs_state.addr~I .operation_mode = "normal";
defparam \uC_CTRL|prs_state.addr~I .packed_mode = "false";
defparam \uC_CTRL|prs_state.addr~I .lut_mask = "FF01";
defparam \uC_CTRL|prs_state.addr~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC5_4_H2
apex20ke_lcell \uC_CTRL|dtack_oe~0_I (
// Equation(s):
// \uC_CTRL|dtack_oe~0  = \uC_CTRL|prs_state.idle  & !\uC_CTRL|prs_state.addr 

	.dataa(vcc),
	.datab(vcc),
	.datac(\uC_CTRL|prs_state.idle ),
	.datad(\uC_CTRL|prs_state.addr ),
	.cin(gnd),
	.cascin(vcc),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\uC_CTRL|dtack_oe~0 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|dtack_oe~0_I .operation_mode = "normal";
defparam \uC_CTRL|dtack_oe~0_I .packed_mode = "false";
defparam \uC_CTRL|dtack_oe~0_I .lut_mask = "00F0";
defparam \uC_CTRL|dtack_oe~0_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC4_16_H2
apex20ke_lcell \uC_CTRL|prs_state.data_trs~I (
// Equation(s):
// \uC_CTRL|prs_state.data_trs  = DFFE(\uC_CTRL|ds_int  & \uC_CTRL|address_match  & \uC_CTRL|prs_state.addr , GLOBAL(\clk~combout ), GLOBAL(\reset~combout ), , )

	.dataa(vcc),
	.datab(\uC_CTRL|ds_int ),
	.datac(\uC_CTRL|address_match ),
	.datad(\uC_CTRL|prs_state.addr ),
	.cin(gnd),
	.cascin(vcc),
	.clk(\clk~combout ),
	.aclr(!\reset~combout ),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\uC_CTRL|prs_state.data_trs ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|prs_state.data_trs~I .operation_mode = "normal";
defparam \uC_CTRL|prs_state.data_trs~I .packed_mode = "false";
defparam \uC_CTRL|prs_state.data_trs~I .lut_mask = "C000";
defparam \uC_CTRL|prs_state.data_trs~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at PIN_H8
apex20ke_io \r_w~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\r_w~combout ),
	.regout(),
	.padio(r_w));
// synopsys translate_off
defparam \r_w~I .operation_mode = "input";
defparam \r_w~I .reg_source_mode = "none";
defparam \r_w~I .feedback_mode = "from_pin";
defparam \r_w~I .power_up = "low";
// synopsys translate_on

// atom is at PIN_B7
apex20ke_io \addr_bus[3]~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\addr_bus[3]~combout ),
	.regout(),
	.padio(addr_bus[3]));
// synopsys translate_off
defparam \addr_bus[3]~I .operation_mode = "input";
defparam \addr_bus[3]~I .reg_source_mode = "none";
defparam \addr_bus[3]~I .feedback_mode = "from_pin";
defparam \addr_bus[3]~I .power_up = "low";
// synopsys translate_on

// atom is at PIN_B11
apex20ke_io \addr_bus[4]~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\addr_bus[4]~combout ),
	.regout(),
	.padio(addr_bus[4]));
// synopsys translate_off
defparam \addr_bus[4]~I .operation_mode = "input";
defparam \addr_bus[4]~I .reg_source_mode = "none";
defparam \addr_bus[4]~I .feedback_mode = "from_pin";
defparam \addr_bus[4]~I .power_up = "low";
// synopsys translate_on

// atom is at LC5_2_H2
apex20ke_lcell \uC_CTRL|data_en~57_I (
// Equation(s):
// \uC_CTRL|data_en~57  = !\addr_bus[3]~combout  & \addr_bus[4]~combout 

	.dataa(vcc),
	.datab(vcc),
	.datac(\addr_bus[3]~combout ),
	.datad(\addr_bus[4]~combout ),
	.cin(gnd),
	.cascin(vcc),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\uC_CTRL|data_en~57 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|data_en~57_I .operation_mode = "normal";
defparam \uC_CTRL|data_en~57_I .packed_mode = "false";
defparam \uC_CTRL|data_en~57_I .lut_mask = "0F00";
defparam \uC_CTRL|data_en~57_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at PIN_D7
apex20ke_io \addr_bus[2]~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\addr_bus[2]~combout ),
	.regout(),
	.padio(addr_bus[2]));
// synopsys translate_off
defparam \addr_bus[2]~I .operation_mode = "input";
defparam \addr_bus[2]~I .reg_source_mode = "none";
defparam \addr_bus[2]~I .feedback_mode = "from_pin";
defparam \addr_bus[2]~I .power_up = "low";
// synopsys translate_on

// atom is at PIN_H11
apex20ke_io \addr_bus[0]~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\addr_bus[0]~combout ),
	.regout(),
	.padio(addr_bus[0]));
// synopsys translate_off
defparam \addr_bus[0]~I .operation_mode = "input";
defparam \addr_bus[0]~I .reg_source_mode = "none";
defparam \addr_bus[0]~I .feedback_mode = "from_pin";
defparam \addr_bus[0]~I .power_up = "low";
// synopsys translate_on

// atom is at PIN_C6
apex20ke_io \addr_bus[5]~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\addr_bus[5]~combout ),
	.regout(),
	.padio(addr_bus[5]));
// synopsys translate_off
defparam \addr_bus[5]~I .operation_mode = "input";
defparam \addr_bus[5]~I .reg_source_mode = "none";
defparam \addr_bus[5]~I .feedback_mode = "from_pin";
defparam \addr_bus[5]~I .power_up = "low";
// synopsys translate_on

// atom is at PIN_L10
apex20ke_io \addr_bus[6]~I (
	.datain(gnd),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.oe(gnd),
	.preset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\addr_bus[6]~combout ),
	.regout(),
	.padio(addr_bus[6]));
// synopsys translate_off
defparam \addr_bus[6]~I .operation_mode = "input";
defparam \addr_bus[6]~I .reg_source_mode = "none";
defparam \addr_bus[6]~I .feedback_mode = "from_pin";
defparam \addr_bus[6]~I .power_up = "low";
// synopsys translate_on

// atom is at LC10_15_H2
apex20ke_lcell \uC_CTRL|data_en~55_I (
// Equation(s):
// \uC_CTRL|data_en~55  = \addr_bus[7]~combout  & !\addr_bus[5]~combout  & !\addr_bus[6]~combout  & \uC_CTRL|address_match 

	.dataa(\addr_bus[7]~combout ),
	.datab(\addr_bus[5]~combout ),
	.datac(\addr_bus[6]~combout ),
	.datad(\uC_CTRL|address_match ),
	.cin(gnd),
	.cascin(vcc),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\uC_CTRL|data_en~55 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|data_en~55_I .operation_mode = "normal";
defparam \uC_CTRL|data_en~55_I .packed_mode = "false";
defparam \uC_CTRL|data_en~55_I .lut_mask = "0200";
defparam \uC_CTRL|data_en~55_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC8_11_H2
apex20ke_lcell \uC_CTRL|data_en~56_I (
// Equation(s):
// \uC_CTRL|data_en~56  = \addr_bus[0]~combout  & \uC_CTRL|data_en~55 

	.dataa(vcc),
	.datab(vcc),
	.datac(\addr_bus[0]~combout ),
	.datad(\uC_CTRL|data_en~55 ),
	.cin(gnd),
	.cascin(vcc),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\uC_CTRL|data_en~56 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|data_en~56_I .operation_mode = "normal";
defparam \uC_CTRL|data_en~56_I .packed_mode = "false";
defparam \uC_CTRL|data_en~56_I .lut_mask = "F000";
defparam \uC_CTRL|data_en~56_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC5_11_H2
apex20ke_lcell \uC_CTRL|cntrl_en~I (
// Equation(s):
// \uC_CTRL|cntrl_en  = DFFE(!\addr_bus[1]~combout  & \uC_CTRL|data_en~57  & !\addr_bus[2]~combout  & \uC_CTRL|data_en~56 , GLOBAL(\clk~combout ), GLOBAL(\reset~combout ), , )

	.dataa(\addr_bus[1]~combout ),
	.datab(\uC_CTRL|data_en~57 ),
	.datac(\addr_bus[2]~combout ),
	.datad(\uC_CTRL|data_en~56 ),
	.cin(gnd),
	.cascin(vcc),
	.clk(\clk~combout ),
	.aclr(!\reset~combout ),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\uC_CTRL|cntrl_en ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|cntrl_en~I .operation_mode = "normal";
defparam \uC_CTRL|cntrl_en~I .packed_mode = "false";
defparam \uC_CTRL|cntrl_en~I .lut_mask = "0400";
defparam \uC_CTRL|cntrl_en~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC9_16_H1
apex20ke_lcell \uC_CTRL|men~48_I (
// Equation(s):
// \uC_CTRL|men~48  = \uC_CTRL|prs_state.data_trs  & !\r_w~combout  & \uC_CTRL|cntrl_en 

	.dataa(vcc),
	.datab(\uC_CTRL|prs_state.data_trs ),
	.datac(\r_w~combout ),
	.datad(\uC_CTRL|cntrl_en ),
	.cin(gnd),
	.cascin(vcc),
	.clk(gnd),
	.aclr(gnd),
	.ena(vcc),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\uC_CTRL|men~48 ),
	.regout(),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|men~48_I .operation_mode = "normal";
defparam \uC_CTRL|men~48_I .packed_mode = "false";
defparam \uC_CTRL|men~48_I .lut_mask = "0C00";
defparam \uC_CTRL|men~48_I .output_mode = "comb_only";
// synopsys translate_on

// atom is at LC7_16_H1
apex20ke_lcell \uC_CTRL|mien~reg0_I (
// Equation(s):
// \uC_CTRL|mien~reg0  = DFFE(\data_bus[6]~1 , GLOBAL(\clk~combout ), GLOBAL(\reset~combout ), , \uC_CTRL|men~48 )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\data_bus[6]~1 ),
	.cin(gnd),
	.cascin(vcc),
	.clk(\clk~combout ),
	.aclr(!\reset~combout ),
	.ena(\uC_CTRL|men~48 ),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\uC_CTRL|mien~reg0 ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|mien~reg0_I .operation_mode = "normal";
defparam \uC_CTRL|mien~reg0_I .packed_mode = "false";
defparam \uC_CTRL|mien~reg0_I .lut_mask = "FF00";
defparam \uC_CTRL|mien~reg0_I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC3_16_E1
apex20ke_lcell \uC_CTRL|men~reg0_I (
// Equation(s):
// \uC_CTRL|men~reg0  = DFFE(\data_bus[7]~0 , GLOBAL(\clk~combout ), GLOBAL(\reset~combout ), , \uC_CTRL|men~48 )

	.dataa(vcc),
	.datab(vcc),
	.datac(vcc),
	.datad(\data_bus[7]~0 ),
	.cin(gnd),
	.cascin(vcc),
	.clk(\clk~combout ),
	.aclr(!\reset~combout ),
	.ena(\uC_CTRL|men~48 ),
	.sclr(gnd),
	.sload(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\uC_CTRL|men~reg0 ),
	.cout(),
	.cascout());
// synopsys translate_off
defparam \uC_CTRL|men~reg0_I .operation_mode = "normal";
defparam \uC_CTRL|men~reg0_I .packed_mode = "false";
defparam \uC_CTRL|men~reg0_I .lut_mask = "FF00";
defparam \uC_CTRL|men~reg0_I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC5_13_E2
apex20ke_lcell \I2C_CTRL|sda_in~I (
// Equation(s):
// \I2C_CTRL|sda_in  = DFFE(!\sda~0 , GLOBAL(\clk~combout ), GLOBAL(\uC_CTRL|men~reg0 ), , )

	.dataa(vcc),
	.datab(vcc),
	.datac(\sda~0 ),
	.datad(vcc),
	.cin(gnd),
	.cascin(vcc),
	.clk(\clk~combout ),
	.aclr(!\uC_CTRL|men