adc.map.eqn

来自「用verilog编程实现的基于FPGA的AD数据采集程序」· EQN 代码 · 共 937 行 · 第 1/2 页

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--B1_control is adc_1:inst|control
--operation mode is normal

B1_control_lut_out = F1_f_r $ !B1_flag;
B1_control = DFFEA(B1_control_lut_out, E1_CLK_OUT, , , , , );

--B1L4Q is adc_1:inst|control~1
--operation mode is normal

B1L4Q = B1_control;


--D7_data_out[11] is adc_3:inst10|data_out[11]
--operation mode is normal

D7_data_out[11]_lut_out = data_in[11];
D7_data_out[11] = DFFEA(D7_data_out[11]_lut_out, !ad_sts, , , , , );

--D7L52Q is adc_3:inst10|data_out[11]~12
--operation mode is normal

D7L52Q = D7_data_out[11];


--D7_data_out[10] is adc_3:inst10|data_out[10]
--operation mode is normal

D7_data_out[10]_lut_out = data_in[10];
D7_data_out[10] = DFFEA(D7_data_out[10]_lut_out, !ad_sts, , , , , );

--D7L32Q is adc_3:inst10|data_out[10]~13
--operation mode is normal

D7L32Q = D7_data_out[10];


--D7_data_out[9] is adc_3:inst10|data_out[9]
--operation mode is normal

D7_data_out[9]_lut_out = data_in[9];
D7_data_out[9] = DFFEA(D7_data_out[9]_lut_out, !ad_sts, , , , , );

--D7L12Q is adc_3:inst10|data_out[9]~14
--operation mode is normal

D7L12Q = D7_data_out[9];


--D7_data_out[8] is adc_3:inst10|data_out[8]
--operation mode is normal

D7_data_out[8]_lut_out = data_in[8];
D7_data_out[8] = DFFEA(D7_data_out[8]_lut_out, !ad_sts, , , , , );

--D7L91Q is adc_3:inst10|data_out[8]~15
--operation mode is normal

D7L91Q = D7_data_out[8];


--D7_data_out[7] is adc_3:inst10|data_out[7]
--operation mode is normal

D7_data_out[7]_lut_out = data_in[7];
D7_data_out[7] = DFFEA(D7_data_out[7]_lut_out, !ad_sts, , , , , );

--D7L71Q is adc_3:inst10|data_out[7]~16
--operation mode is normal

D7L71Q = D7_data_out[7];


--D7_data_out[6] is adc_3:inst10|data_out[6]
--operation mode is normal

D7_data_out[6]_lut_out = data_in[6];
D7_data_out[6] = DFFEA(D7_data_out[6]_lut_out, !ad_sts, , , , , );

--D7L51Q is adc_3:inst10|data_out[6]~17
--operation mode is normal

D7L51Q = D7_data_out[6];


--D7_data_out[5] is adc_3:inst10|data_out[5]
--operation mode is normal

D7_data_out[5]_lut_out = data_in[5];
D7_data_out[5] = DFFEA(D7_data_out[5]_lut_out, !ad_sts, , , , , );

--D7L31Q is adc_3:inst10|data_out[5]~18
--operation mode is normal

D7L31Q = D7_data_out[5];


--D7_data_out[4] is adc_3:inst10|data_out[4]
--operation mode is normal

D7_data_out[4]_lut_out = data_in[4];
D7_data_out[4] = DFFEA(D7_data_out[4]_lut_out, !ad_sts, , , , , );

--D7L11Q is adc_3:inst10|data_out[4]~19
--operation mode is normal

D7L11Q = D7_data_out[4];


--D7_data_out[3] is adc_3:inst10|data_out[3]
--operation mode is normal

D7_data_out[3]_lut_out = data_in[3];
D7_data_out[3] = DFFEA(D7_data_out[3]_lut_out, !ad_sts, , , , , );

--D7L9Q is adc_3:inst10|data_out[3]~20
--operation mode is normal

D7L9Q = D7_data_out[3];


--D7_data_out[2] is adc_3:inst10|data_out[2]
--operation mode is normal

D7_data_out[2]_lut_out = data_in[2];
D7_data_out[2] = DFFEA(D7_data_out[2]_lut_out, !ad_sts, , , , , );

--D7L7Q is adc_3:inst10|data_out[2]~21
--operation mode is normal

D7L7Q = D7_data_out[2];


--D7_data_out[1] is adc_3:inst10|data_out[1]
--operation mode is normal

D7_data_out[1]_lut_out = data_in[1];
D7_data_out[1] = DFFEA(D7_data_out[1]_lut_out, !ad_sts, , , , , );

--D7L5Q is adc_3:inst10|data_out[1]~22
--operation mode is normal

D7L5Q = D7_data_out[1];


--D7_data_out[0] is adc_3:inst10|data_out[0]
--operation mode is normal

D7_data_out[0]_lut_out = data_in[0];
D7_data_out[0] = DFFEA(D7_data_out[0]_lut_out, !ad_sts, , , , , );

--D7L3Q is adc_3:inst10|data_out[0]~23
--operation mode is normal

D7L3Q = D7_data_out[0];


--F1_f_r is adc_4:inst11|f_r
--operation mode is normal

F1_f_r_lut_out = !F1_f_r;
F1_f_r = DFFEA(F1_f_r_lut_out, !ad_sts, , , , , );

--F1L2Q is adc_4:inst11|f_r~1
--operation mode is normal

F1L2Q = F1_f_r;


--B1_flag is adc_1:inst|flag
--operation mode is normal

B1_flag_lut_out = F1_f_r;
B1_flag = DFFEA(B1_flag_lut_out, E1_CLK_OUT, , , B1L1, , );

--B1L6Q is adc_1:inst|flag~3
--operation mode is normal

B1L6Q = B1_flag;


--B1L1 is adc_1:inst|always0~0
--operation mode is normal

B1L1 = F1_f_r $ B1_flag;

--B1L2 is adc_1:inst|always0~2
--operation mode is normal

B1L2 = F1_f_r $ B1_flag;


--E1_CLK_OUT is did:inst3|CLK_OUT
--operation mode is normal

E1_CLK_OUT_lut_out = E1_num[2] # E1_num[1] & E1_num[0];
E1_CLK_OUT = DFFEA(E1_CLK_OUT_lut_out, clk, , , , , );

--E1L2Q is did:inst3|CLK_OUT~0
--operation mode is normal

E1L2Q = E1_CLK_OUT;


--E1_num[1] is did:inst3|num[1]
--operation mode is normal

E1_num[1]_lut_out = E1_num[0] & !E1_num[2] & (!E1_num[1]) # !E1_num[0] & (E1_num[1]);
E1_num[1] = DFFEA(E1_num[1]_lut_out, clk, , , , , );

--E1L7Q is did:inst3|num[1]~113
--operation mode is normal

E1L7Q = E1_num[1];


--E1_num[0] is did:inst3|num[0]
--operation mode is normal

E1_num[0]_lut_out = !E1_num[0];
E1_num[0] = DFFEA(E1_num[0]_lut_out, clk, , , , , );

--E1L5Q is did:inst3|num[0]~114
--operation mode is normal

E1L5Q = E1_num[0];


--E1_num[2] is did:inst3|num[2]
--operation mode is normal

E1_num[2]_lut_out = E1_num[0] & !E1_num[2] & (E1_num[1]) # !E1_num[0] & E1_num[2];
E1_num[2] = DFFEA(E1_num[2]_lut_out, clk, , , , , );

--E1L9Q is did:inst3|num[2]~115
--operation mode is normal

E1L9Q = E1_num[2];


--data_in[11] is data_in[11]
--operation mode is input

data_in[11] = INPUT();


--ad_sts is ad_sts
--operation mode is input

ad_sts = INPUT();


--data_in[10] is data_in[10]
--operation mode is input

data_in[10] = INPUT();


--data_in[9] is data_in[9]
--operation mode is input

data_in[9] = INPUT();


--data_in[8] is data_in[8]
--operation mode is input

data_in[8] = INPUT();


--data_in[7] is data_in[7]
--operation mode is input

data_in[7] = INPUT();


--data_in[6] is data_in[6]
--operation mode is input

data_in[6] = INPUT();


--data_in[5] is data_in[5]
--operation mode is input

data_in[5] = INPUT();


--data_in[4] is data_in[4]
--operation mode is input

data_in[4] = INPUT();


--data_in[3] is data_in[3]
--operation mode is input

data_in[3] = INPUT();


--data_in[2] is data_in[2]
--operation mode is input

data_in[2] = INPUT();


--data_in[1] is data_in[1]
--operation mode is input

data_in[1] = INPUT();


--data_in[0] is data_in[0]
--operation mode is input

data_in[0] = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--control is control
--operation mode is output

control = OUTPUT(B1_control);


--add_out1[2] is add_out1[2]
--operation mode is output

add_out1[2] = OUTPUT(GND);


--add_out1[1] is add_out1[1]
--operation mode is output

add_out1[1] = OUTPUT(GND);


--add_out1[0] is add_out1[0]
--operation mode is output

add_out1[0] = OUTPUT(GND);


--data_out1[11] is data_out1[11]
--operation mode is output

data_out1[11] = OUTPUT(D7_data_out[11]);


--data_out1[10] is data_out1[10]
--operation mode is output

data_out1[10] = OUTPUT(D7_data_out[10]);


--data_out1[9] is data_out1[9]
--operation mode is output

data_out1[9] = OUTPUT(D7_data_out[9]);


--data_out1[8] is data_out1[8]
--operation mode is output

data_out1[8] = OUTPUT(D7_data_out[8]);


--data_out1[7] is data_out1[7]
--operation mode is output

data_out1[7] = OUTPUT(D7_data_out[7]);


--data_out1[6] is data_out1[6]
--operation mode is output

data_out1[6] = OUTPUT(D7_data_out[6]);


--data_out1[5] is data_out1[5]
--operation mode is output

data_out1[5] = OUTPUT(D7_data_out[5]);


--data_out1[4] is data_out1[4]
--operation mode is output

data_out1[4] = OUTPUT(D7_data_out[4]);


--data_out1[3] is data_out1[3]
--operation mode is output

data_out1[3] = OUTPUT(D7_data_out[3]);


--data_out1[2] is data_out1[2]
--operation mode is output

data_out1[2] = OUTPUT(D7_data_out[2]);


--data_out1[1] is data_out1[1]
--operation mode is output

data_out1[1] = OUTPUT(D7_data_out[1]);


--data_out1[0] is data_out1[0]
--operation mode is output

data_out1[0] = OUTPUT(D7_data_out[0]);


--data_out2[11] is data_out2[11]
--operation mode is output

data_out2[11] = OUTPUT(GND);


--data_out2[10] is data_out2[10]
--operation mode is output

data_out2[10] = OUTPUT(GND);


--data_out2[9] is data_out2[9]
--operation mode is output

data_out2[9] = OUTPUT(GND);


--data_out2[8] is data_out2[8]
--operation mode is output

data_out2[8] = OUTPUT(GND);


--data_out2[7] is data_out2[7]
--operation mode is output

data_out2[7] = OUTPUT(GND);


--data_out2[6] is data_out2[6]
--operation mode is output

data_out2[6] = OUTPUT(GND);


--data_out2[5] is data_out2[5]