📄 xkcon.fit.rpt
字号:
Fitter report for xkcon
Fri Dec 30 09:48:32 2005
Version 5.0 Build 148 04/26/2005 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Fitter Summary
3. Fitter Settings
4. Fitter Device Options
5. Fitter Equations
6. Pin-Out File
7. Fitter Resource Usage Summary
8. Input Pins
9. Output Pins
10. Bidir Pins
11. All Package Pins
12. I/O Standard
13. Dedicated Inputs I/O
14. Output Pin Default Load For Reported TCO
15. Fitter Resource Utilization by Entity
16. Control Signals
17. Global & Other Fast Signals
18. Non-Global High Fan-Out Signals
19. Interconnect Usage Summary
20. LAB External Interconnect
21. LAB Macrocells
22. Parallel Expander
23. Shareable Expander
24. Logic Cell Interconnection
25. Fitter Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+------------------------------------------------------------------+
; Fitter Summary ;
+-----------------------+------------------------------------------+
; Fitter Status ; Successful - Fri Dec 30 09:48:32 2005 ;
; Quartus II Version ; 5.0 Build 148 04/26/2005 SJ Full Version ;
; Revision Name ; xkcon ;
; Top-level Entity Name ; xkcon ;
; Family ; MAX7000S ;
; Device ; EPM7128SLC84-15 ;
; Timing Models ; Final ;
; Total macrocells ; 112 / 128 ( 87 % ) ;
; Total pins ; 56 / 68 ( 82 % ) ;
+-----------------------+------------------------------------------+
+--------------------------------------------------------------------------------------+
; Fitter Settings ;
+--------------------------------------------+--------------------+--------------------+
; Option ; Setting ; Default Value ;
+--------------------------------------------+--------------------+--------------------+
; Device ; EPM7128SLC84-15 ; ;
; Slow Slew Rate ; On ; Off ;
; Fitter Effort ; Standard Fit ; Auto Fit ;
; Use smart compilation ; Off ; Off ;
; Optimize Timing ; Normal compilation ; Normal compilation ;
; Optimize IOC Register Placement for Timing ; On ; On ;
; Limit to One Fitting Attempt ; Off ; Off ;
; Fitter Initial Placement Seed ; 1 ; 1 ;
+--------------------------------------------+--------------------+--------------------+
+----------------------------------------------------------------------------------------+
; Fitter Device Options ;
+----------------------------------------------+-----------------------------------------+
; Option ; Setting ;
+----------------------------------------------+-----------------------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off ;
; Enable device-wide reset (DEV_CLRn) ; Off ;
; Enable device-wide output enable (DEV_OE) ; Off ;
; Enable INIT_DONE output ; Off ;
; Configuration scheme ; Passive Serial ;
; Reserve all unused pins ; As output driving an unspecified signal ;
; Security bit ; Off ;
; Base pin-out file on sameframe device ; Off ;
+----------------------------------------------+-----------------------------------------+
+------------------+
; Fitter Equations ;
+------------------+
The equations can be found in D:/文档/相控改造/程序代码/CPLD/xkcon.fit.eqn.
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