⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 tone.rpt

📁 本源码设计了自动电子琴
💻 RPT
📖 第 1 页 / 共 3 页
字号:
   -      5    C    01        OR2      t        2      1   1    8    3    1    0  :1098
   -      7    B    02        XOR      t        0      0   0    8    1    1    4  :1127
   -      2    A    03       SOFT    s t        0      0   0    3    1    0    1  ~1152~1
   -      6    B    02        XOR      t        4      2   1    8    4    1    0  :1152
   -      5    B    02        OR2      t        0      0   0    8    0    1    1  :1179
   -      4    B    02        OR2      t        0      0   0    8    1    1    0  :1208
   -      3    C    01        OR2      t        1      0   0    8    2    1    0  :1260
   -      4    C    01        OR2      t        1      0   1    8    2    1    0  :1287
   -      3    B    02        OR2      t        0      0   0    8    2    1    0  :1314
   -      8    B    02       SOFT    s t        0      0   0    8    0    0    2  ~1341~1
   -     10    B    02       SOFT    s t        0      0   0    8    0    0    2  ~1341~2
   -     13    B    02        XOR      t        2      1   1    8    4    1    0  :1341


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register


Device-Specific Information:               d:\maxplus2\biancheng\vhdl\tone.rpt
tone

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

         FastTrack                                 
Row     Interconnect    Input Pins     Output Pins     Bidir Pins
A:       7/ 96(  7%)    0/16(  0%)      0/16(  0%)     0/16(  0%)
B:      16/ 96( 16%)    0/16(  0%)      4/16( 25%)     0/16(  0%)
C:      11/ 96( 11%)    0/16(  0%)      2/16( 12%)     0/16(  0%)
D:       4/ 96(  4%)    0/16(  0%)      2/16( 12%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:     10/48( 20%)     1/20(  5%)      7/20( 35%)       0/20(  0%)
02:      8/48( 16%)     1/20(  5%)      7/20( 35%)       0/20(  0%)
03:      4/48(  8%)     2/20( 10%)      0/20(  0%)       0/20(  0%)
04:      0/48(  0%)     0/20(  0%)      0/20(  0%)       0/20(  0%)
05:      0/48(  0%)     0/20(  0%)      0/20(  0%)       0/20(  0%)


Device-Specific Information:               d:\maxplus2\biancheng\vhdl\tone.rpt
tone

** EQUATIONS **

index0   : INPUT;
index1   : INPUT;
index2   : INPUT;
index3   : INPUT;
index4   : INPUT;
index5   : INPUT;
index6   : INPUT;
index7   : INPUT;

-- Node name is 'code0' 
-- Equation name is 'code0', type is output 
code0    =  _LC13_B2;

-- Node name is 'code1' 
-- Equation name is 'code1', type is output 
code1    =  _LC3_B2;

-- Node name is 'code2' 
-- Equation name is 'code2', type is output 
code2    =  _LC4_C1;

-- Node name is 'code3' 
-- Equation name is 'code3', type is output 
code3    =  _LC3_C1;

-- Node name is 'code4' 
-- Equation name is 'code4', type is output 
code4    =  _LC13_C1;

-- Node name is 'code5' 
-- Equation name is 'code5', type is output 
code5    =  _LC4_B2;

-- Node name is 'code6' 
-- Equation name is 'code6', type is output 
code6    =  _LC5_B2;

-- Node name is 'high' 
-- Equation name is 'high', type is output 
high     =  _LC15_C1;

-- Node name is 'tone00' 
-- Equation name is 'tone00', type is output 
tone00   =  _LC6_B2;

-- Node name is 'tone01' 
-- Equation name is 'tone01', type is output 
tone01   =  _LC7_B2;

-- Node name is 'tone02' 
-- Equation name is 'tone02', type is output 
tone02   =  _LC5_C1;

-- Node name is 'tone03' 
-- Equation name is 'tone03', type is output 
tone03   =  _LC6_C1;

-- Node name is 'tone04' 
-- Equation name is 'tone04', type is output 
tone04   = !_LC10_C1;

-- Node name is 'tone05' 
-- Equation name is 'tone05', type is output 
tone05   =  _LC9_D5;

-- Node name is 'tone06' 
-- Equation name is 'tone06', type is output 
tone06   =  _LC11_B2;

-- Node name is 'tone07' 
-- Equation name is 'tone07', type is output 
tone07   =  _LC9_B2;

-- Node name is 'tone08' 
-- Equation name is 'tone08', type is output 
tone08   =  _LC9_C1;

-- Node name is 'tone09' 
-- Equation name is 'tone09', type is output 
tone09   =  _LC11_D4;

-- Node name is 'tone010' 
-- Equation name is 'tone010', type is output 
tone010  =  _LC2_B2;

-- Node name is 'tone011' 
-- Equation name is 'tone011', type is output 
tone011  =  _LC11_C1;

-- Node name is 'tone012' 
-- Equation name is 'tone012', type is output 
tone012  =  _LC1_B2;

-- Node name is 'tone013' 
-- Equation name is 'tone013', type is output 
tone013  =  _LC15_B2;

-- Node name is ':658' 
-- Equation name is '_LC15_C1', type is buried 
_LC15_C1 = LCELL( _EQ001 $  GND);
  _EQ001 =  index0 &  index1 &  index2 &  index3 &  index4 &  index5 & 
              index6 & !index7;

-- Node name is ':678' 
-- Equation name is '_LC10_C1', type is buried 
!_LC10_C1 = _LC10_C1~NOT;
_LC10_C1~NOT = LCELL( VCC $  _EQ002);
  _EQ002 =  index0 &  index1 &  index2 &  index3 &  index4 &  index5 & 
             !index6 &  index7;

-- Node name is ':778' 
-- Equation name is '_LC13_C1', type is buried 
_LC13_C1 = LCELL( _EQ003 $  GND);
  _EQ003 =  index0 & !index1 &  index2 &  index3 &  index4 &  index5 & 
              index6 &  index7;

-- Node name is ':803' 
-- Equation name is '_LC15_B2', type is buried 
_LC15_B2 = LCELL( _EQ004 $  VCC);
  _EQ004 =  index0 &  index1 & !index2 &  index3 &  index4 &  index5 & 
              index6 &  index7
         #  _LC5_B2
         #  _LC13_C1;

-- Node name is ':828' 
-- Equation name is '_LC1_B2', type is buried 
_LC1_B2  = LCELL( _EQ005 $  VCC);
  _EQ005 =  _LC15_B2 &  _LC15_C1
         #  _LC10_C1 &  _LC15_B2
         #  index0 &  index1 &  index2 &  index3 &  index4 & !index5 & 
              index6 &  index7 &  _LC15_B2
         #  index0 &  index1 &  index2 &  index3 & !index4 &  index5 & 
              index6 &  index7 &  _LC15_B2;

-- Node name is ':857' 
-- Equation name is '_LC11_C1', type is buried 
_LC11_C1 = LCELL( _EQ006 $  VCC);
  _EQ006 = !index0 &  index1 &  index2 &  index3 &  index4 &  index5 & 
              index6 &  index7
         #  index0 &  index1 &  index2 &  index3 & !index4 &  index5 & 
              index6 &  index7 & !_LC13_C1
         #  index0 &  index1 &  index2 &  index3 &  index4 & !index5 & 
              index6 &  index7 & !_LC13_C1;

-- Node name is ':884' 
-- Equation name is '_LC2_B2', type is buried 
_LC2_B2  = LCELL( _EQ007 $  GND);
  _EQ007 =  index0 &  index1 & !index2 &  index3 &  index4 &  index5 & 
              index6 &  index7 &  _LC7_B2
         #  index0 &  index1 &  index2 & !index3 &  index4 &  index5 & 
              index6 &  index7 &  _LC7_B2
         #  index0 &  index1 &  index2 &  index3 &  index4 & !index5 & 
              index6 &  index7 &  _LC7_B2
         #  _LC7_B2 & !_LC8_B2 & !_LC10_C1 & !_LC15_C1;

-- Node name is '~909~1' 
-- Equation name is '~909~1', location is LC11_D4, type is buried.
_LC11_D4 = LCELL( _LC1_C1 $  GND);

-- Node name is '~909~2' 
-- Equation name is '~909~2', location is LC8_C1, type is buried.
-- synthesized logic cell 
_LC8_C1  = LCELL( _EQ008 $  GND);
  _EQ008 = !index2 & !index5 & !_LC10_C1 & !_LC13_C1 & !_LC15_C1
         #  index0 &  index1 &  index2 & !index3 &  index4 &  index5 & 
              index6 &  index7 & !_LC13_C1;

-- Node name is ':909' 
-- Equation name is '_LC1_C1', type is buried 
!_LC1_C1 = _LC1_C1~NOT;
_LC1_C1~NOT = LCELL( _EQ009 $ !_LC8_C1);
  _EQ009 =  index0 &  index1 &  index2 &  index3 & !index4 &  index5 & 
              index6 &  index7 & !_LC8_C1 & !_LC13_C1
         #  index2 &  index5 & !_LC8_C1 & !_LC10_C1 & !_LC13_C1 & !_LC15_C1
         # !index0 &  index1 &  index2 &  index3 &  index4 &  index5 & 
              index6 &  index7 & !_LC8_C1
         # !_LC8_C1 & !_LC10_C1 & !_LC13_C1 & !_LC15_C1 &  _X001;
  _X001  = EXP( index0 &  index1 &  index3 &  index4 &  index6 &  index7);

-- Node name is '~936~1' 
-- Equation name is '~936~1', location is LC7_C1, type is buried.
-- synthesized logic cell 
_LC7_C1  = LCELL( _EQ010 $  GND);
  _EQ010 =  index0 &  index1 &  index5 &  index6 &  index7;

-- Node name is ':936' 
-- Equation name is '_LC9_C1', type is buried 
_LC9_C1  = LCELL( _EQ011 $  GND);
  _EQ011 = !index0 &  index1 &  index2 &  index3 &  index4 &  index5 & 
              index6 &  index7
         # !index2 & !index3 & !_LC10_C1 & !_LC13_C1
         #  index2 &  index3 &  index4 & !_LC10_C1 & !_LC13_C1
         # !_LC7_C1 & !_LC10_C1 & !_LC13_C1
         # !index4 & !_LC10_C1 & !_LC13_C1 &  _X002;
  _X002  = EXP( index2 &  index3);

-- Node name is ':965' 
-- Equation name is '_LC9_B2', type is buried 
_LC9_B2  = LCELL( _EQ012 $  _EQ013);
  _EQ012 =  index0 &  index1 &  index2 &  index3 &  index4 & !index5 & 
              index6 &  index7 &  _LC7_B2 & !_LC10_C1
         #  index0 &  index1 &  index2 &  index3 & !index4 &  index5 & 
              index6 &  index7 &  _LC7_B2 & !_LC10_C1
         #  index0 &  index1 &  index2 & !index3 &  index4 &  index5 & 
              index6 &  index7 &  _LC7_B2 & !_LC10_C1

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -