untitled2.tdf

七段显示译码器（功能：将思维二进制数译成七段输出信号

LIBRARY IEEE;
USE ieee.std_logic_1164.all;
ENTITY leddecoder IS
PORT(
     a3,a2,a1,a0         :in std_logic;
     Ya,Yb,Yc,Yd,Ye,Yf,Yg:out std_logic;
     );
END leddecoder;
ARCHITECTURE led_are of leddecoder IS
signal A:std_logic_vector(3 downto 0);
signal Y:std_logic_vector(6 downto 0);
BEGIN
A<=a3&a2&a1&a0;
Ya<=Y(6);Yb<=Y(5);Yc<=Y(4);Yd<=Y(3);Ye<=Y(2);Yf<=Y(1);Yg<=Y(0);
WITH A select
Y<="0000001"when"0000",
   "1001111"when"0001",
   "001010"when"0010",
   "0000110"when"0011",
   "1001100"when"0100",
   "0100100"when"0101",
   "0100000"when"0110",
   "0001111"when"0111",
   "0000000"when"1000",
   "0000100"when"1001",
   "0001000"when"1010",
   "1100000"when"1011",
   "0110001"when"1100",
   "1000010"when"1101",
   "0110000"when"1110",
   "0111000"when"1111",
   "1111111"when others;
END led_arc;