usbrefdesign.map.qmsg

这是一个在MAX II CPLD利用FT245BM 模块实现USB传输的读写程序

{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "USB_T:inst2\|USB_WU data_in VCC " "Warning: Reduced register \"USB_T:inst2\|USB_WU\" with stuck data_in port to stuck value VCC" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 22 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "USB_T:inst2\|Data2USB\[4\] USB_T:inst2\|Data2USB\[7\] " "Info: Duplicate register \"USB_T:inst2\|Data2USB\[4\]\" merged to single register \"USB_T:inst2\|Data2USB\[7\]\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "USB_T:inst2\|Data2USB\[5\] USB_T:inst2\|Data2USB\[7\] " "Info: Duplicate register \"USB_T:inst2\|Data2USB\[5\]\" merged to single register \"USB_T:inst2\|Data2USB\[7\]\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "USB_T:inst2\|Data2USB\[1\] USB_T:inst2\|Data2USB\[7\] " "Info: Duplicate register \"USB_T:inst2\|Data2USB\[1\]\" merged to single register \"USB_T:inst2\|Data2USB\[7\]\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "USB_T:inst2\|Data2USB\[3\] USB_T:inst2\|Data2USB\[6\] " "Info: Duplicate register \"USB_T:inst2\|Data2USB\[3\]\" merged to single register \"USB_T:inst2\|Data2USB\[6\]\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "USB_T:inst2\|Data2USB\[0\] USB_T:inst2\|Data2USB\[6\] " "Info: Duplicate register \"USB_T:inst2\|Data2USB\[0\]\" merged to single register \"USB_T:inst2\|Data2USB\[6\]\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "USB_T:inst2\|Data2USB\[2\] USB_T:inst2\|Data2USB\[6\] " "Info: Duplicate register \"USB_T:inst2\|Data2USB\[2\]\" merged to single register \"USB_T:inst2\|Data2USB\[6\]\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "USB_T:inst2\|Data2USB\[7\] data_in GND " "Warning: Reduced register \"USB_T:inst2\|Data2USB\[7\]\" with stuck data_in port to stuck value GND" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 38 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|USBRefDesign\|USB_T:inst2\|State 4 " "Info: State machine \"\|USBRefDesign\|USB_T:inst2\|State\" contains 4 states" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "One-Hot \|USBRefDesign\|USB_T:inst2\|State " "Info: Selected One-Hot state machine encoding method for state machine \"\|USBRefDesign\|USB_T:inst2\|State\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|USBRefDesign\|USB_T:inst2\|State " "Info: Encoding result for state machine \"\|USBRefDesign\|USB_T:inst2\|State\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "USB_T:inst2\|State.01000 " "Info: Encoded state bit \"USB_T:inst2\|State.01000\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "USB_T:inst2\|State.00100 " "Info: Encoded state bit \"USB_T:inst2\|State.00100\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "USB_T:inst2\|State.00010 " "Info: Encoded state bit \"USB_T:inst2\|State.00010\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "USB_T:inst2\|State.00001 " "Info: Encoded state bit \"USB_T:inst2\|State.00001\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|USBRefDesign\|USB_T:inst2\|State.00001 0000 " "Info: State \"\|USBRefDesign\|USB_T:inst2\|State.00001\" uses code string \"0000\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|USBRefDesign\|USB_T:inst2\|State.00100 0101 " "Info: State \"\|USBRefDesign\|USB_T:inst2\|State.00100\" uses code string \"0101\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|USBRefDesign\|USB_T:inst2\|State.00010 0011 " "Info: State \"\|USBRefDesign\|USB_T:inst2\|State.00010\" uses code string \"0011\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|USBRefDesign\|USB_T:inst2\|State.01000 1001 " "Info: State \"\|USBRefDesign\|USB_T:inst2\|State.01000\" uses code string \"1001\"" {  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "USB_T.v" "" { Text "F:/ylc627/QuartusProjectWR/USB_T.v" 34 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WSGN_MISSING_HIER_NAME" "DivideClock:inst5 " "Warning: Hierarchy name \"DivideClock:inst5\" does not exist.  It is associated with user assignments." {  } {  } 0 0 "Hierarchy name \"%1!s!\" does not exist.  It is associated with user assignments." 0 0}
{ "Warning" "WSGN_MISSING_HIER_NAME" "SRAMInterface:inst36 " "Warning: Hierarchy name \"SRAMInterface:inst36\" does not exist.  It is associated with user assignments." {  } {  } 0 0 "Hierarchy name \"%1!s!\" does not exist.  It is associated with user assignments." 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "USB_WU VCC " "Warning: Pin \"USB_WU\" stuck at VCC" {  } { { "USBRefDesign.bdf" "" { Schematic "F:/ylc627/QuartusProjectWR/USBRefDesign.bdf" { { 160 776 952 176 "USB_WU" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "1 1 " "Info: 1 registers lost all their fanouts during netlist optimizations. The first 1 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "inst2/State~51 " "Info: Register \"inst2/State~51\" lost all its fanouts during netlist optimizations." {  } {  } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0}  } {  } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0}
{ "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN_HDR" "2 " "Warning: Design contains 2 input pin(s) that do not drive logic" { { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "key_in " "Warning: No output dependent on input pin \"key_in\"" {  } { { "USBRefDesign.bdf" "" { Schematic "F:/ylc627/QuartusProjectWR/USBRefDesign.bdf" { { 408 -104 64 424 "key_in" "" } } } }  } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0} { "Warning" "WSCL_SCL_UNNECESSARY_INPUT_PIN" "RXF_n " "Warning: No output dependent on input pin \"RXF_n\"" {  } { { "USBRefDesign.bdf" "" { Schematic "F:/ylc627/QuartusProjectWR/USBRefDesign.bdf" { { 224 32 200 240 "RXF_n" "" } } } }  } 0 0 "No output dependent on input pin \"%1!s!\"" 0 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "24 " "Info: Implemented 24 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "5 " "Info: Implemented 5 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "2 " "Info: Implemented 2 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_BIDIRS" "8 " "Info: Implemented 8 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "9 " "Info: Implemented 9 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 10 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 10 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "127 " "Info: Allocated 127 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jun 10 17:58:33 2008 " "Info: Processing ended: Tue Jun 10 17:58:33 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "F:/ylc627/QuartusProjectWR/USBRefDesign.map.smsg " "Info: Generated suppressed messages file F:/ylc627/QuartusProjectWR/USBRefDesign.map.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}