clksim.map.rpt

设计实体：lcd驱动器 --彩色液晶芯片LQ080V3DG01 --原创针对博创开发板UP-SOPC2000开发板写的彩色液晶驱动程序

; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO       ; Untyped             ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0          ; Untyped             ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0          ; Untyped             ;
; CBXI_PARAMETER                                 ; mult_9q01  ; Untyped             ;
; INPUT_A_FIXED_VALUE                            ; Bx         ; Untyped             ;
; INPUT_B_FIXED_VALUE                            ; Bx         ; Untyped             ;
+------------------------------------------------+------------+---------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------+
; lpm_mult Parameter Settings by Entity Instance              ;
+---------------------------------------+---------------------+
; Name                                  ; Value               ;
+---------------------------------------+---------------------+
; Number of entity instances            ; 1                   ;
; Entity Instance                       ; lpm_mult:mult_rtl_0 ;
;     -- LPM_WIDTHA                     ; 7                   ;
;     -- LPM_WIDTHB                     ; 11                  ;
;     -- LPM_WIDTHP                     ; 18                  ;
;     -- LPM_REPRESENTATION             ; SIGNED              ;
;     -- INPUT_A_IS_CONSTANT            ; YES                 ;
;     -- INPUT_B_IS_CONSTANT            ; NO                  ;
;     -- USE_EAB                        ; OFF                 ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                  ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                  ;
+---------------------------------------+---------------------+


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in C:/Documents and Settings/Administrator/桌面/lcd/时序模拟/clksim.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Mon Jun 02 14:09:17 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off clksim -c clksim
Info: Found 2 design units, including 1 entities, in source file clksim.vhd
    Info: Found design unit 1: clksim-behav
    Info: Found entity 1: clksim
Info: Elaborating entity "clksim" for the top level hierarchy
Warning: VHDL Process Statement warning at clksim.vhd(98): signal "dout" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at clksim.vhd(118): signal "DataDisptemp" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Info: VHDL Case Statement information at clksim.vhd(133): OTHERS choice is never selected
Warning: VHDL Process Statement warning at clksim.vhd(136): signal "Hsync_temp" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at clksim.vhd(162): signal "Vsync_temp" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Info: VHDL Case Statement information at clksim.vhd(2210): OTHERS choice is never selected
Info: State machine "|clksim|present_state" contains 6 states and 0 state bits
Info: Selected Auto state machine encoding method for state machine "|clksim|present_state"
Info: Encoding result for state machine "|clksim|present_state"
    Info: Completed encoding using 6 state bits
        Info: Encoded state bit "present_state.st5"
        Info: Encoded state bit "present_state.st4"
        Info: Encoded state bit "present_state.st3"
        Info: Encoded state bit "present_state.st2"
        Info: Encoded state bit "present_state.st1"
        Info: Encoded state bit "present_state.st0"
    Info: State "|clksim|present_state.st0" uses code string "000000"
    Info: State "|clksim|present_state.st1" uses code string "000011"
    Info: State "|clksim|present_state.st2" uses code string "000101"
    Info: State "|clksim|present_state.st3" uses code string "001001"
    Info: State "|clksim|present_state.st4" uses code string "010001"
    Info: State "|clksim|present_state.st5" uses code string "100001"
Info: Found 1 design units, including 1 entities, in source file ../../../../../altera/quartus50/libraries/megafunctions/lpm_mult.tdf
    Info: Found entity 1: lpm_mult
Info: Found 1 design units, including 1 entities, in source file db/mult_9q01.tdf
    Info: Found entity 1: mult_9q01
Warning: Latch Data_Disp[0]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[1]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[2]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[3]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[4]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[5]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[6]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[7]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[8]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[9]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[10]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[11]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[12]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[13]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[14]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch Data_Disp[15]$latch has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st3
Warning: Latch addr[7] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[9] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[4] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[6] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[8] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[5] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[2] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[3] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[0] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[1] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Latch addr[10] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal present_state.st2
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "ENAB" stuck at GND
Warning: Design contains 1 input pin(s) that do not drive logic
    Warning: No output dependent on input pin "bit3"
Info: Implemented 980 device resources after synthesis - the final resource count might be different
    Info: Implemented 4 input pins
    Info: Implemented 20 output pins
    Info: Implemented 954 logic cells
    Info: Implemented 2 DSP elements
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 62 warnings
    Info: Processing ended: Mon Jun 02 14:11:04 2008
    Info: Elapsed time: 00:01:48