cpu_mem.mif

8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc

-- Copyright (C) 1991-2006 Altera Corporation
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-- functions, and any output files any of the foregoing 
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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- Quartus II generated Memory Initialization File (.mif)

WIDTH=8;
DEPTH=64;

ADDRESS_RADIX=BIN;
DATA_RADIX=HEX;

CONTENT BEGIN
	0000000  :   00;
	0000001  :   15;
	0000010  :   24;
	0000011  :   D0;
	0000100  :   1F;
	0000101  :   94;
	0000110  :   31;
	0000111  :   E0;
	0001000  :   1E;
	0001001  :   41;
	0001010  :   A1;
	0001011  :   61;
	0001100  :   84;
	0001101  :   51;
	0001110  :   28;
	0001111  :   2D;
	0010000  :   7B;
	0010001  :   D0;
	0010010  :   1E;
	0010011  :   C0;
	0010100  :   19;
	0010101  :   D0;
	0010110  :   1D;
	0010111  :   BD;
	0011000  :   13;
	0011001  :   F0;
	[0011010..0011110]  :   00;
	0011111  :   39;
	[0100000..0111111]  :   00;
END;