fpga_lcm.bld

清华大学verilog hdl源码例子

Release 6.2i - ngdbuild G.28
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -intstyle ise -dd
f:\trainsilicon\fpgaschool\testcade\fpga40xc200\basic2\lcm\ise\lcm/_ngo -uc
fpga_lcm.ucf -p xc2s200-pq208-5 fpga_lcm.ngc fpga_lcm.ngd 

Reading NGO file
"f:/trainsilicon/fpgaschool/testcade/fpga40xc200/basic2/lcm/ise/lcm/fpga_lcm.ngc
" ...
Reading component libraries for design expansion...

Annotating constraints to design from file "fpga_lcm.ucf" ...

Checking timing specifications ...
Checking expanded design ...

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 38076 kilobytes

Writing NGD file "fpga_lcm.ngd" ...

Writing NGDBUILD log file "fpga_lcm.bld"...