bcd2.vhd

来自「实现bcd码与二进制码之间的相互转换功能」· VHDL 代码 · 共 21 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
use ieee.STD_logic_unsigned.all;
ENTITY hehee IS
 PORT(a,b:in STD_LOGIC_VECTOR(3 downto 0);
      sum:OUT STD_LOGIC_VECTOR(4 downto 0));
END hehee;
ARCHITECTURE one of hehee IS
  signal temp:STD_LOGIC_VECTOR(4 downto 0);
BEGIN
  process(a,b)
     begin
     temp<=('0'&a)+('0'&b);
      if (temp>"10011")then sum<="00000";
      elsif (temp<="10011") then sum<= temp + "00110";
      else sum<=temp;
   end  if;
   end process;
    END ARCHITECTURE one;