watch.sim.rpt

基于CYCLONG II的自己编的电子时钟.早期作品了,可能这方面的资料也比较多,但是个人思路不同,希望我的程序能给朋友们提供些须帮助.

The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                         ;
+---------------------------------------+---------------------------------------+------------------+
; Node Name                             ; Output Port Name                      ; Output Port Type ;
+---------------------------------------+---------------------------------------+------------------+
; |watch_a|hour:dff4|Add0~60            ; |watch_a|hour:dff4|Add0~60            ; combout          ;
; |watch_a|hour:dff4|Add0~60            ; |watch_a|hour:dff4|Add0~61            ; cout             ;
; |watch_a|hour:dff4|Add0~62            ; |watch_a|hour:dff4|Add0~62            ; combout          ;
; |watch_a|hour:dff4|Add0~62            ; |watch_a|hour:dff4|Add0~63            ; cout             ;
; |watch_a|hour:dff4|Add0~64            ; |watch_a|hour:dff4|Add0~64            ; combout          ;
; |watch_a|hour:dff4|Add0~64            ; |watch_a|hour:dff4|Add0~65            ; cout             ;
; |watch_a|hour:dff4|Add0~66            ; |watch_a|hour:dff4|Add0~66            ; combout          ;
; |watch_a|hour:dff4|Add0~66            ; |watch_a|hour:dff4|Add0~67            ; cout             ;
; |watch_a|hour:dff4|Add0~68            ; |watch_a|hour:dff4|Add0~68            ; combout          ;
; |watch_a|minute:dff3|cout1[1]         ; |watch_a|minute:dff3|cout1[1]         ; regout           ;
; |watch_a|minute:dff3|cout1[2]         ; |watch_a|minute:dff3|cout1[2]         ; regout           ;
; |watch_a|minute:dff3|cout1[3]         ; |watch_a|minute:dff3|cout1[3]         ; regout           ;
; |watch_a|minute:dff3|cout2[0]         ; |watch_a|minute:dff3|cout2[0]         ; regout           ;
; |watch_a|minute:dff3|cout2[1]         ; |watch_a|minute:dff3|cout2[1]         ; regout           ;
; |watch_a|minute:dff3|cout2[2]         ; |watch_a|minute:dff3|cout2[2]         ; regout           ;
; |watch_a|hour:dff4|cout[0]            ; |watch_a|hour:dff4|cout[0]            ; regout           ;
; |watch_a|hour:dff4|cout[1]            ; |watch_a|hour:dff4|cout[1]            ; regout           ;
; |watch_a|hour:dff4|cout[2]            ; |watch_a|hour:dff4|cout[2]            ; regout           ;
; |watch_a|hour:dff4|cout[3]            ; |watch_a|hour:dff4|cout[3]            ; regout           ;
; |watch_a|hour:dff4|cout[4]            ; |watch_a|hour:dff4|cout[4]            ; regout           ;
; |watch_a|minute:dff3|cout1[2]~91      ; |watch_a|minute:dff3|cout1[2]~91      ; combout          ;
; |watch_a|minute:dff3|cout1~92         ; |watch_a|minute:dff3|cout1~92         ; combout          ;
; |watch_a|minute:dff3|Equal0~36        ; |watch_a|minute:dff3|Equal0~36        ; combout          ;
; |watch_a|minute:dff3|cout2~86         ; |watch_a|minute:dff3|cout2~86         ; combout          ;
; |watch_a|minute:dff3|cout2~87         ; |watch_a|minute:dff3|cout2~87         ; combout          ;
; |watch_a|hour:dff4|Equal0~43          ; |watch_a|hour:dff4|Equal0~43          ; combout          ;
; |watch_a|hour:dff4|cout~83            ; |watch_a|hour:dff4|cout~83            ; combout          ;
; |watch_a|hour:dff4|cout~84            ; |watch_a|hour:dff4|cout~84            ; combout          ;
; |watch_a|minute:dff3|cout1[0]~93      ; |watch_a|minute:dff3|cout1[0]~93      ; combout          ;
; |watch_a|minute:dff3|cout2[0]~88      ; |watch_a|minute:dff3|cout2[0]~88      ; combout          ;
; |watch_a|m1[1]                        ; |watch_a|m1[1]                        ; padio            ;
; |watch_a|m1[2]                        ; |watch_a|m1[2]                        ; padio            ;
; |watch_a|m1[3]                        ; |watch_a|m1[3]                        ; padio            ;
; |watch_a|m2[0]                        ; |watch_a|m2[0]                        ; padio            ;
; |watch_a|m2[1]                        ; |watch_a|m2[1]                        ; padio            ;
; |watch_a|m2[2]                        ; |watch_a|m2[2]                        ; padio            ;
; |watch_a|h[0]                         ; |watch_a|h[0]                         ; padio            ;
; |watch_a|h[1]                         ; |watch_a|h[1]                         ; padio            ;
; |watch_a|h[2]                         ; |watch_a|h[2]                         ; padio            ;
; |watch_a|h[3]                         ; |watch_a|h[3]                         ; padio            ;
; |watch_a|h[4]                         ; |watch_a|h[4]                         ; padio            ;
; |watch_a|clear                        ; |watch_a|clear                        ; combout          ;
; |watch_a|clear~clkctrl                ; |watch_a|clear~clkctrl                ; outclk           ;
; |watch_a|minute:dff3|cout2[2]~clkctrl ; |watch_a|minute:dff3|cout2[2]~clkctrl ; outclk           ;
+---------------------------------------+---------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                         ;
+---------------------------------------+---------------------------------------+------------------+
; Node Name                             ; Output Port Name                      ; Output Port Type ;
+---------------------------------------+---------------------------------------+------------------+
; |watch_a|hour:dff4|Add0~60            ; |watch_a|hour:dff4|Add0~60            ; combout          ;
; |watch_a|hour:dff4|Add0~60            ; |watch_a|hour:dff4|Add0~61            ; cout             ;
; |watch_a|hour:dff4|Add0~62            ; |watch_a|hour:dff4|Add0~62            ; combout          ;
; |watch_a|hour:dff4|Add0~62            ; |watch_a|hour:dff4|Add0~63            ; cout             ;
; |watch_a|hour:dff4|Add0~64            ; |watch_a|hour:dff4|Add0~64            ; combout          ;
; |watch_a|hour:dff4|Add0~64            ; |watch_a|hour:dff4|Add0~65            ; cout             ;
; |watch_a|hour:dff4|Add0~66            ; |watch_a|hour:dff4|Add0~66            ; combout          ;
; |watch_a|hour:dff4|Add0~66            ; |watch_a|hour:dff4|Add0~67            ; cout             ;
; |watch_a|hour:dff4|Add0~68            ; |watch_a|hour:dff4|Add0~68            ; combout          ;
; |watch_a|minute:dff3|cout1[0]         ; |watch_a|minute:dff3|cout1[0]         ; regout           ;
; |watch_a|minute:dff3|cout1[1]         ; |watch_a|minute:dff3|cout1[1]         ; regout           ;
; |watch_a|minute:dff3|cout1[2]         ; |watch_a|minute:dff3|cout1[2]         ; regout           ;
; |watch_a|minute:dff3|cout1[3]         ; |watch_a|minute:dff3|cout1[3]         ; regout           ;
; |watch_a|minute:dff3|cout2[0]         ; |watch_a|minute:dff3|cout2[0]         ; regout           ;
; |watch_a|minute:dff3|cout2[1]         ; |watch_a|minute:dff3|cout2[1]         ; regout           ;
; |watch_a|minute:dff3|cout2[2]         ; |watch_a|minute:dff3|cout2[2]         ; regout           ;
; |watch_a|hour:dff4|cout[0]            ; |watch_a|hour:dff4|cout[0]            ; regout           ;
; |watch_a|hour:dff4|cout[1]            ; |watch_a|hour:dff4|cout[1]            ; regout           ;
; |watch_a|hour:dff4|cout[2]            ; |watch_a|hour:dff4|cout[2]            ; regout           ;
; |watch_a|hour:dff4|cout[3]            ; |watch_a|hour:dff4|cout[3]            ; regout           ;
; |watch_a|hour:dff4|cout[4]            ; |watch_a|hour:dff4|cout[4]            ; regout           ;
; |watch_a|minute:dff3|cout1~90         ; |watch_a|minute:dff3|cout1~90         ; combout          ;
; |watch_a|minute:dff3|cout1[2]~91      ; |watch_a|minute:dff3|cout1[2]~91      ; combout          ;
; |watch_a|minute:dff3|cout1~92         ; |watch_a|minute:dff3|cout1~92         ; combout          ;
; |watch_a|minute:dff3|Equal0~36        ; |watch_a|minute:dff3|Equal0~36        ; combout          ;
; |watch_a|minute:dff3|cout2~86         ; |watch_a|minute:dff3|cout2~86         ; combout          ;
; |watch_a|minute:dff3|cout2~87         ; |watch_a|minute:dff3|cout2~87         ; combout          ;
; |watch_a|hour:dff4|Equal0~43          ; |watch_a|hour:dff4|Equal0~43          ; combout          ;
; |watch_a|hour:dff4|cout~83            ; |watch_a|hour:dff4|cout~83            ; combout          ;
; |watch_a|hour:dff4|cout~84            ; |watch_a|hour:dff4|cout~84            ; combout          ;
; |watch_a|minute:dff3|cout2[0]~88      ; |watch_a|minute:dff3|cout2[0]~88      ; combout          ;
; |watch_a|m1[0]                        ; |watch_a|m1[0]                        ; padio            ;
; |watch_a|m1[1]                        ; |watch_a|m1[1]                        ; padio            ;
; |watch_a|m1[2]                        ; |watch_a|m1[2]                        ; padio            ;
; |watch_a|m1[3]                        ; |watch_a|m1[3]                        ; padio            ;
; |watch_a|m2[0]                        ; |watch_a|m2[0]                        ; padio            ;
; |watch_a|m2[1]                        ; |watch_a|m2[1]                        ; padio            ;
; |watch_a|m2[2]                        ; |watch_a|m2[2]                        ; padio            ;
; |watch_a|h[0]                         ; |watch_a|h[0]                         ; padio            ;
; |watch_a|h[1]                         ; |watch_a|h[1]                         ; padio            ;
; |watch_a|h[2]                         ; |watch_a|h[2]                         ; padio            ;
; |watch_a|h[3]                         ; |watch_a|h[3]                         ; padio            ;
; |watch_a|h[4]                         ; |watch_a|h[4]                         ; padio            ;
; |watch_a|minute:dff3|cout2[2]~clkctrl ; |watch_a|minute:dff3|cout2[2]~clkctrl ; outclk           ;
+---------------------------------------+---------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 6.1 Build 201 11/27/2006 SJ Web Edition
    Info: Processing started: Thu May 17 11:13:24 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off watch -c watch
Info: Using vector source file "D:/works/模电/lab/VHDL/watch/Waveform2.vwf"
Info: Overwriting simulation input file with simulation results
    Info: A backup of Waveform2.vwf called watch.sim_ori.vwf has been created in the db folder
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      34.72 %
Info: Number of transitions in simulation is 1191
Info: Vector file Waveform2.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Allocated 89 megabytes of memory during processing
    Info: Processing ended: Thu May 17 11:13:25 2007
    Info: Elapsed time: 00:00:01