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📄 dds.tan.rpt

📁 基于CYCLONE II的程序,DDS原理的函数信号发生器.采用查表法实现.各位可以参考.
💻 RPT
📖 第 1 页 / 共 4 页
字号:
; clk             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                                                                           ;
+-------+------------------------------------------------+--------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period)                           ; From                                                                                       ; To                                                                                         ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+--------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.708 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.648 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.612 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 1.549 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.506 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 1.489 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk        ; clk      ; None                        ; None                      ; 1.478 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.471 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 1.453 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk        ; clk      ; None                        ; None                      ; 1.418 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk        ; clk      ; None                        ; None                      ; 1.407 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.400 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk        ; clk      ; None                        ; None                      ; 1.382 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 1.347 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk        ; clk      ; None                        ; None                      ; 1.347 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk        ; clk      ; None                        ; None                      ; 1.336 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 1.312 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk        ; clk      ; None                        ; None                      ; 1.311 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 1.297 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk        ; clk      ; None                        ; None                      ; 1.276 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk        ; clk      ; None                        ; None                      ; 1.276 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; clk        ; clk      ; None                        ; None                      ; 1.265 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 1.241 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk        ; clk      ; None                        ; None                      ; 1.241 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk        ; clk      ; None                        ; None                      ; 1.240 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk        ; clk      ; None                        ; None                      ; 1.205 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; clk        ; clk      ; None                        ; None                      ; 1.205 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; clk        ; clk      ; None                        ; None                      ; 1.194 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk        ; clk      ; None                        ; None                      ; 0.855 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk        ; clk      ; None                        ; None                      ; 0.855 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; clk        ; clk      ; None                        ; None                      ; 0.854 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk        ; clk      ; None                        ; None                      ; 0.843 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk        ; clk      ; None                        ; None                      ; 0.822 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk        ; clk      ; None                        ; None                      ; 0.818 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; clk        ; clk      ; None                        ; None                      ; 0.818 ns                ;
; N/A   ; Restricted to 420.17 MHz ( period = 2.380 ns ) ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[0] ; clk        ; clk      ; None                        ; None                      ; 0.811 ns                ;
+-------+------------------------------------------------+--------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                   ;
+-------+--------------+------------+-----------+--------------------------------------------------------------------------------------------+----------+
; Slack ; Required tsu ; Actual tsu ; From      ; To                                                                                         ; To Clock ;
+-------+--------------+------------+-----------+--------------------------------------------------------------------------------------------+----------+
; N/A   ; None         ; 5.502 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 5.343 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk      ;
; N/A   ; None         ; 5.272 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk      ;
; N/A   ; None         ; 5.231 ns   ; pin_in[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 5.201 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk      ;
; N/A   ; None         ; 5.130 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk      ;
; N/A   ; None         ; 5.072 ns   ; pin_in[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk      ;
; N/A   ; None         ; 5.059 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; clk      ;
; N/A   ; None         ; 5.001 ns   ; pin_in[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk      ;
; N/A   ; None         ; 4.930 ns   ; pin_in[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk      ;
; N/A   ; None         ; 4.798 ns   ; pin_in[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 4.723 ns   ; pin_in[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 4.673 ns   ; pin_in[1] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[1] ; clk      ;
; N/A   ; None         ; 4.662 ns   ; pin_in[6] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 4.639 ns   ; pin_in[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk      ;
; N/A   ; None         ; 4.568 ns   ; pin_in[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk      ;
; N/A   ; None         ; 4.564 ns   ; pin_in[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk      ;
; N/A   ; None         ; 4.544 ns   ; pin_in[3] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk      ;
; N/A   ; None         ; 4.497 ns   ; pin_in[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk      ;
; N/A   ; None         ; 4.493 ns   ; pin_in[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk      ;
; N/A   ; None         ; 4.426 ns   ; pin_in[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[3] ; clk      ;
; N/A   ; None         ; 4.348 ns   ; pin_in[5] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 4.189 ns   ; pin_in[5] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk      ;
; N/A   ; None         ; 4.186 ns   ; pin_in[6] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[6] ; clk      ;
; N/A   ; None         ; 4.110 ns   ; pin_in[4] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[4] ; clk      ;
; N/A   ; None         ; 4.043 ns   ; pin_in[2] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[2] ; clk      ;
; N/A   ; None         ; 3.914 ns   ; pin_in[7] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;
; N/A   ; None         ; 3.802 ns   ; pin_in[5] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[5] ; clk      ;
; N/A   ; None         ; 1.065 ns   ; pin_in[0] ; add_sub:inst|lpm_add_sub:lpm_add_sub_component|add_sub_blg:auto_generated|pipeline_dffe[7] ; clk      ;

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