any_div_1.hif

基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）

Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version
11
702
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
any_div_1
# storage
db|any_div_1.(0).cnf
db|any_div_1.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
any_div_1.vhd
667a3b29b072682cc4ab18aae0686edf
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
n
6
PARAMETER_DEC
DEF
}
# hierarchies {
|
}
# end
# complete